Commit Graph

2661 Commits

Author SHA1 Message Date
whitequark
abb36b42be compiler.iodelay: fold and eval SToMU to an int, not float. 2015-11-24 00:19:33 +08:00
whitequark
178ff74da2 transforms.interleaver: inline calls. 2015-11-24 00:02:07 +08:00
whitequark
2a82eb7219 compiler.ir: return dict from Delay.substs, not pair iterable. 2015-11-24 00:01:10 +08:00
whitequark
02f2763ea8 compiler.iodelay: always fully fold SToMU and MUToS. 2015-11-23 23:59:59 +08:00
whitequark
f3da227e2d compiler.ir: change argument order for BasicBlock.insert. 2015-11-23 23:59:25 +08:00
whitequark
f0fd6cd0ca compiler.algorithms.inline: implement. 2015-11-23 23:58:37 +08:00
whitequark
a4525b21cf compiler.ir: print even blocks without predecessors. 2015-11-23 23:55:12 +08:00
whitequark
d92b3434a0 compiler.ir: print basic blocks in reverse postorder for readability. 2015-11-23 21:44:38 +08:00
whitequark
c73b2c1a78 compiler.ir: fix typo. 2015-11-23 21:21:01 +08:00
whitequark
0bf425eefa compiler.ir: maintain use lists while mutating instructions. 2015-11-23 19:18:58 +08:00
whitequark
03b4e4027c transforms.interleaver: fix IR type/value mismatch. 2015-11-23 18:53:42 +08:00
whitequark
9fc7a42036 pipistrello: expose LED{1..4} as RTIO channels. 2015-11-23 18:26:45 +08:00
whitequark
73845279ae transforms.interleaver: determine when inlining is not necessary. 2015-11-23 18:08:33 +08:00
de30a4b060 master/worker: print short exception info in first log entry of worker error 2015-11-22 23:26:32 +08:00
whitequark
af43c66149 artiq_compile: set file_import prefix, like in artiq_run. 2015-11-21 17:37:14 +08:00
whitequark
a01e328b4a transforms.interleaver: don't assume all delay expressions are folded. 2015-11-21 17:24:00 +08:00
whitequark
5cd12ffd28 compiler.iodelay: fold MUToS and SToMU. 2015-11-21 17:23:20 +08:00
Felix Held
8b4b269371 doc/manual/installing: fix a bug, add Fedora specific instructions
Signed-off-by: Felix Held <felix-artiq@felixheld.de>
2015-11-21 10:23:58 +08:00
whitequark
82b470891f transforms.interleaver: handle function calls (as atomic so far).
This commit solves issue #2 described in 50e7b44; a function call
is now a valid decomposition for a delay instruction, and this
metadata is propagated when the interleaver converts delays.

However, the interleaver does not yet detect that a called function
is compound, i.e. it is not correct.
2015-11-21 03:34:24 +08:00
whitequark
57dd163d37 transforms.artiq_ir_generator: fix decomposition of explicit delay_mu(). 2015-11-21 03:27:06 +08:00
whitequark
cb3b811fd7 compiler: maintain both the IR and iodelay forms of delay expressions.
After this commit, the delay instruction (again) does not generate
any LLVM IR: all heavy lifting is relegated to the delay and delay_mu
intrinsics. When the interleave transform needs to adjust the global
timeline, it synthesizes a delay_mu intrinsnic. This way,
the interleave transformation becomes composable, as the input and
the output IR invariants are the same.

Also, code generation is adjusted so that a basic block is split off
not only after a delay call, but also before one; otherwise, e.g.,
code immediately at the beginning of a `with parallel:` branch
would have no choice but to execute after another branch has already
advanced the timeline.

This takes care of issue #1 described in 50e7b44 and is a step
to solving issue #2.
2015-11-21 03:22:47 +08:00
whitequark
50e7b44d04 compiler: actually implement interleaving correctly (calls are still broken).
The previous implementation was completely wrong: it always advanced
the global timeline by the same amount as the non-interleaved basic
block did.

The new implementation only advances the global timeline by
the difference between its current time and the virtual time of
the branch, which requires it to adjust the delay instructions.

Previously, the delay expression was present in the IR twice: once
as the iodelay.Expr transformation-visible form, and once as regular
IR instructions, with the latter form being passed to the delay_mu
builtin and advancing the runtime timeline.

As a result of this change, this strategy is no longer valid:
we can meaningfully mutate the iodelay.Expr form but not the IR
instruction form. Thus, IR instructions are no longer generated for
delay expressions, and the LLVM lowering pass now has to lower
the iodelay.Expr objects as well.

This works OK for flat `with parallel:` expressions, but breaks down
outside of `with parallel:` or when calls are present. The reasons
it breaks down are as follows:

  * Outside of `with parallel:`, delay() and delay_mu() must accept
    any expression, but iodelay.Expr's are not nearly expressive
    enough. So, the IR instruction form must actually be kept as well.

  * A delay instruction is currently inserted after a call to
    a user-defined function; this delay instruction introduces
    a point where basic block reordering is possible as well as
    provides delay information. However, the callee knows nothing
    about the context in which it is called, which means that
    the runtime timeline is advanced twice. So, a new terminator
    instruction must be added that combines the properties of delay
    and call instructions (and another for delay and invoke as well).
2015-11-21 00:02:47 +08:00
whitequark
73c358a59a Reformat. 2015-11-20 23:33:06 +08:00
whitequark
cb9e7d15bf compiler.iodelay: subtraction certainly shouldn't be commutative. 2015-11-20 22:15:03 +08:00
whitequark
cc623c13b4 Reformat. 2015-11-20 21:45:34 +08:00
whitequark
d0f86e05d0 transforms.interleaver: add safety check. 2015-11-20 17:27:04 +08:00
whitequark
88b7990714 transforms.iodelay_estimator: fail statements with indeterminate delay inside with parallel. 2015-11-20 17:10:25 +08:00
whitequark
28fa68730a Merge branch 'master' into new-py2llvm 2015-11-20 15:55:29 +08:00
9826b19c9a gui/scan: adapt layout to show more decimals 2015-11-20 11:20:15 +08:00
whitequark
00ec574d73 transforms.interleaver: implement (without inlining). 2015-11-20 00:03:26 +08:00
whitequark
025bfbe746 transforms.llvm_ir_generator: accept delay instructions.
The delay instruction is just like a branch (discontinuity
in instruction flow), but it also carries metadata: how long
did the execution of its basic block take. This metadata only
matters during inlining and interleaving, so we treat it here
as a mere branch.
2015-11-19 23:55:52 +08:00
whitequark
9639a831bc transforms.artiq_ir_generator: correctly emit IfExpT with control flow.
This can happen with nested if expressions, as well as if
the if expression includes delays.
2015-11-19 23:44:39 +08:00
whitequark
b9bb5fba6a lit-test: fix iodelay/class test (broken in 506725f). 2015-11-19 23:28:50 +08:00
whitequark
a04d0f8fbd lit-test: fix inferencer/error_class test (broken in b0c6b70). 2015-11-19 23:28:00 +08:00
whitequark
2543daa5cf transforms.artiq_ir_generator: don't emit delay instruction for zero delay.
Call nodes with iodelay=Const(0) can be generated outside of
`with parallel:`, where Interleaver won't and LLVMIRGenerator can't
lower them.
2015-11-19 23:24:46 +08:00
whitequark
58db347e01 transforms.iodelay_estimator: fix uninitialized access. 2015-11-19 23:23:39 +08:00
108aed569e gui/models/DictSyncTreeSepModel: add getitem 2015-11-17 22:53:11 +08:00
537fa2287b gui/models/DictSyncTreeSepModel: fix item row update 2015-11-17 22:39:46 +08:00
7bebc52959 gui/explorer: reduce impact of Qt selection display bug 2015-11-17 22:38:01 +08:00
250ab6b489 gui/explorer: tree view 2015-11-17 19:46:26 +08:00
9c5db288a5 gui/datasets: tree view 2015-11-17 19:46:17 +08:00
107d8f0ffa gui/models: add DictSyncTreeSepModel 2015-11-17 19:45:28 +08:00
whitequark
48a2bb10d5 transforms.interleaver: add boilerplate. 2015-11-17 05:22:20 +03:00
whitequark
de9d7eb2e4 compiler: add delay IR instruction. 2015-11-17 05:16:43 +03:00
whitequark
956d2afcb2 compiler.iodelay: fold Max further. 2015-11-17 03:06:07 +03:00
whitequark
7d2fca291d compiler.iodelay: add missing import. 2015-11-17 01:30:19 +03:00
whitequark
e619154c81 transforms.iodelay_estimator: fix handling of with sequential. 2015-11-17 01:22:48 +03:00
whitequark
506725f78a transforms.iodelay_estimator: fix handling of methods. 2015-11-17 01:19:22 +03:00
whitequark
b0c6b70971 transforms.asttyped_rewriter: fix class redefinition diagnostic. 2015-11-17 01:17:25 +03:00
whitequark
80f0bfe0ad lit-test: add test for iodelay order invariance. 2015-11-17 01:04:20 +03:00