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transforms.artiq_ir_generator: fix decomposition of explicit delay_mu().

This commit is contained in:
whitequark 2015-11-21 03:27:06 +08:00
parent cb3b811fd7
commit 57dd163d37
1 changed files with 1 additions and 1 deletions

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@ -1525,7 +1525,7 @@ class ARTIQIRGenerator(algorithm.Visitor):
arg = self.visit(node.args[0])
arg_mu_float = self.append(ir.Arith(ast.Div(loc=None), arg, self.ref_period))
arg_mu = self.append(ir.Coerce(arg_mu_float, builtins.TInt(types.TValue(64))))
self.append(ir.Builtin(typ.name + "_mu", [arg_mu], builtins.TNone()))
return self.append(ir.Builtin(typ.name + "_mu", [arg_mu], builtins.TNone()))
else:
assert False
elif types.is_builtin(typ, "now_mu") or types.is_builtin(typ, "delay_mu") \