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2840 Commits

Author SHA1 Message Date
whitequark 3b529c6f90 compiler.types: implement map. 2015-11-26 11:16:39 +08:00
whitequark e2f7d1047d compiler.testbench: fix after e1cd2ccd. 2015-11-26 10:24:14 +08:00
Sebastien Bourdeauducq e1e082e2ec devices/thorlabs_tcube: minor cleanup 2015-11-25 21:43:22 +08:00
Sebastien Bourdeauducq 178f3cd815 devices/thorlabs_tcube: improve debug logging 2015-11-25 15:28:34 +08:00
Sebastien Bourdeauducq 3c0efb3ad5 gui/log: fix layout problems 2015-11-24 23:04:01 +08:00
whitequark c6ccc87f54 worker: gracefully handle compile errors (fixes #179). 2015-11-24 22:34:33 +08:00
whitequark 5d89acbe82 conda: switch back to default miniconda python, which is now 3.5. 2015-11-24 21:43:00 +08:00
whitequark d560b579f0 doc: update mention of int64. 2015-11-24 20:24:38 +08:00
whitequark d732b6c6d4 doc: nested lists are now supported. 2015-11-24 17:53:40 +08:00
whitequark d14ad6727a compiler.embedding: avoid showing wildly incorrect suggestions. 2015-11-24 17:50:46 +08:00
whitequark 14993e89e2 compiler.embedding: show suggestions for mistyped host object attributes. 2015-11-24 17:44:58 +08:00
whitequark e1cd2ccd40 compiler: pull in dependencies in more finely grained way (fixes #181). 2015-11-24 17:32:04 +08:00
Sebastien Bourdeauducq bda11149df devices/thorlabs_tcube: fix more style issues 2015-11-24 17:10:31 +08:00
Sebastien Bourdeauducq 76eadc0a61 devices/thorlabs_tcube: remove unnecessary {read,write}_exactly functions 2015-11-24 16:55:18 +08:00
whitequark f5187eb140 Remove leftover artiq/transforms/. 2015-11-24 16:00:32 +08:00
Sebastien Bourdeauducq e5b58b50aa remove old compiler code 2015-11-24 15:52:36 +08:00
Sebastien Bourdeauducq 2503dcd837 devices/thorlabs_tcube: remove unnecessary attribute 2015-11-24 15:51:55 +08:00
Sebastien Bourdeauducq 91a8acf304 protocols/pc_rpc: properly convert FullArgSpec to dict 2015-11-24 15:51:13 +08:00
Sebastien Bourdeauducq 8999d57461 examples/mandelbrot: fix variable initialization 2015-11-24 15:26:37 +08:00
whitequark c14299dca8 Merge branch 'new-py2llvm' 2015-11-24 03:01:54 +08:00
whitequark 66b1388a63 transforms.artiq_ir_generator: never put TVars in dicts. 
A TVar looks just like whatever it points to, but it does not
compare equal, nor is its hash the same.
 2015-11-24 02:59:15 +08:00
whitequark fec5c2ebf0 transforms.interleaver: add a diagnostic for interleave inlining failure. 2015-11-24 02:57:03 +08:00
whitequark 8527e306c3 testbench.embedding: use dmgr to get core and export it. 2015-11-24 02:02:34 +08:00
whitequark 2bfc72fba9 testbench.embedding: fix ref_period mismatch. 2015-11-24 00:54:20 +08:00
whitequark d3f0059cab compiler.iodelay: correctly fold max(0, [0, ]...). 2015-11-24 00:46:55 +08:00
whitequark 9bc62fa3d2 transforms.iodelay_estimator: correctly handle functions with empty body. 2015-11-24 00:46:26 +08:00
whitequark e53f26dba0 lit-test: add interleaving/pure_impure_tie. 2015-11-24 00:21:53 +08:00
whitequark 32fe4a8a0c transforms.llvm_ir_generator: don't assert on inlined functions. 2015-11-24 00:20:33 +08:00
whitequark 37b80247f1 lit-test: fix breakage from abb36b4 and 02f2763. 2015-11-24 00:20:00 +08:00
whitequark abb36b42be compiler.iodelay: fold and eval SToMU to an int, not float. 2015-11-24 00:19:33 +08:00
whitequark 178ff74da2 transforms.interleaver: inline calls. 2015-11-24 00:02:07 +08:00
whitequark 2a82eb7219 compiler.ir: return dict from Delay.substs, not pair iterable. 2015-11-24 00:01:10 +08:00
whitequark 02f2763ea8 compiler.iodelay: always fully fold SToMU and MUToS. 2015-11-23 23:59:59 +08:00
whitequark f3da227e2d compiler.ir: change argument order for BasicBlock.insert. 2015-11-23 23:59:25 +08:00
whitequark f0fd6cd0ca compiler.algorithms.inline: implement. 2015-11-23 23:58:37 +08:00
whitequark a4525b21cf compiler.ir: print even blocks without predecessors. 2015-11-23 23:55:12 +08:00
whitequark d92b3434a0 compiler.ir: print basic blocks in reverse postorder for readability. 2015-11-23 21:44:38 +08:00
whitequark c73b2c1a78 compiler.ir: fix typo. 2015-11-23 21:21:01 +08:00
whitequark 0bf425eefa compiler.ir: maintain use lists while mutating instructions. 2015-11-23 19:18:58 +08:00
whitequark 03b4e4027c transforms.interleaver: fix IR type/value mismatch. 2015-11-23 18:53:42 +08:00
whitequark 9fc7a42036 pipistrello: expose LED{1..4} as RTIO channels. 2015-11-23 18:26:45 +08:00
whitequark 73845279ae transforms.interleaver: determine when inlining is not necessary. 2015-11-23 18:08:33 +08:00
Sebastien Bourdeauducq de30a4b060 master/worker: print short exception info in first log entry of worker error 2015-11-22 23:26:32 +08:00
whitequark af43c66149 artiq_compile: set file_import prefix, like in artiq_run. 2015-11-21 17:37:14 +08:00
whitequark a01e328b4a transforms.interleaver: don't assume all delay expressions are folded. 2015-11-21 17:24:00 +08:00
whitequark 5cd12ffd28 compiler.iodelay: fold MUToS and SToMU. 2015-11-21 17:23:20 +08:00
Felix Held 8b4b269371 doc/manual/installing: fix a bug, add Fedora specific instructions 
Signed-off-by: Felix Held <felix-artiq@felixheld.de>
 2015-11-21 10:23:58 +08:00
whitequark 82b470891f transforms.interleaver: handle function calls (as atomic so far). 
This commit solves issue #2 described in 50e7b44; a function call
is now a valid decomposition for a delay instruction, and this
metadata is propagated when the interleaver converts delays.

However, the interleaver does not yet detect that a called function
is compound, i.e. it is not correct.
 2015-11-21 03:34:24 +08:00
whitequark 57dd163d37 transforms.artiq_ir_generator: fix decomposition of explicit delay_mu(). 2015-11-21 03:27:06 +08:00
whitequark cb3b811fd7 compiler: maintain both the IR and iodelay forms of delay expressions. 
After this commit, the delay instruction (again) does not generate
any LLVM IR: all heavy lifting is relegated to the delay and delay_mu
intrinsics. When the interleave transform needs to adjust the global
timeline, it synthesizes a delay_mu intrinsnic. This way,
the interleave transformation becomes composable, as the input and
the output IR invariants are the same.

Also, code generation is adjusted so that a basic block is split off
not only after a delay call, but also before one; otherwise, e.g.,
code immediately at the beginning of a `with parallel:` branch
would have no choice but to execute after another branch has already
advanced the timeline.

This takes care of issue #1 described in 50e7b44 and is a step
to solving issue #2.
 2015-11-21 03:22:47 +08:00