forked from M-Labs/artiq
rtio: fix counter readback
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aa00627c0e
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@ -400,4 +400,4 @@ class Core(Module):
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self.cri.i_status.eq(Array(i_statuses)[sel])
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self.cri.i_status.eq(Array(i_statuses)[sel])
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]
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]
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self.cri.counter.eq(self.counter.value_sys << fine_ts_width)
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self.comb += self.cri.counter.eq(self.counter.value_sys << fine_ts_width)
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