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ddb_template: support different satellite targets

This commit is contained in:
mwojcik 2023-09-27 17:15:13 +08:00 committed by Sébastien Bourdeauducq
parent 0c1b572872
commit fcf6c90ba2
1 changed files with 12 additions and 5 deletions
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17
artiq/frontend/artiq_ddb_template.py
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@ -11,17 +11,20 @@ from artiq.coredevice import jsondesc
from artiq.coredevice.phaser import PHASER_GW_MIQRO, PHASER_GW_BASE from artiq.coredevice.phaser import PHASER_GW_MIQRO, PHASER_GW_BASE
def process_header(output, description): def get_cpu_target(description):
if description.get("type", None) == "shuttler":
return "rv32g"
if description["target"] == "kasli": if description["target"] == "kasli":
if description["hw_rev"] in ("v1.0", "v1.1"): if description["hw_rev"] in ("v1.0", "v1.1"):
cpu_target = "rv32ima" return "rv32ima"
else: else:
cpu_target = "rv32g" return "rv32g"
elif description["target"] == "kasli_soc": elif description["target"] == "kasli_soc":
cpu_target = "cortexa9" return "cortexa9"
else: else:
raise NotImplementedError raise NotImplementedError
def process_header(output, description):
print(textwrap.dedent(""" print(textwrap.dedent("""
# Autogenerated for the {variant} variant # Autogenerated for the {variant} variant
core_addr = "{core_addr}" core_addr = "{core_addr}"
@ -57,6 +60,8 @@ def process_header(output, description):
"class": "CoreDMA" "class": "CoreDMA"
}}, }},
"satellite_cpu_targets": {{}},
"i2c_switch0": {{ "i2c_switch0": {{
"type": "local", "type": "local",
"module": "artiq.coredevice.i2c", "module": "artiq.coredevice.i2c",
@ -74,7 +79,7 @@ def process_header(output, description):
variant=description["variant"], variant=description["variant"],
core_addr=description["core_addr"], core_addr=description["core_addr"],
ref_period=1/(8*description["rtio_frequency"]), ref_period=1/(8*description["rtio_frequency"]),
cpu_target=cpu_target), cpu_target=get_cpu_target(description)),
file=output) file=output)
@ -753,6 +758,7 @@ def process(output, primary_description, satellites):
drtio_peripherals.extend(satellite_drtio_peripherals) drtio_peripherals.extend(satellite_drtio_peripherals)
print("# DEST#{} peripherals".format(destination), file=output) print("# DEST#{} peripherals".format(destination), file=output)
print("device_db[\"satellite_cpu_targets\"][{}] = \"{}\"".format(destination, get_cpu_target(description)), file=output)
rtio_offset = destination << 16 rtio_offset = destination << 16
for peripheral in peripherals: for peripheral in peripherals:
n_channels = pm.process(rtio_offset, peripheral) n_channels = pm.process(rtio_offset, peripheral)
@ -760,6 +766,7 @@ def process(output, primary_description, satellites):
for peripheral in drtio_peripherals: for peripheral in drtio_peripherals:
print("# DEST#{} peripherals".format(peripheral["drtio_destination"]), file=output) print("# DEST#{} peripherals".format(peripheral["drtio_destination"]), file=output)
print("device_db[\"satellite_cpu_targets\"][{}] = \"{}\"".format(peripheral["drtio_destination"], get_cpu_target(peripheral)), file=output)
processor = getattr(pm, "process_"+str(peripheral["type"])) processor = getattr(pm, "process_"+str(peripheral["type"]))
processor(peripheral) processor(peripheral)