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hmc830_7043: document sayma clock muxes

This commit is contained in:
Sebastien Bourdeauducq 2019-01-31 15:10:11 +08:00
parent ec8560911f
commit fa3b40141d
1 changed files with 4 additions and 4 deletions

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@ -9,10 +9,10 @@ mod clock_mux {
pub fn init() { pub fn init() {
unsafe { unsafe {
csr::clock_mux::out_write( csr::clock_mux::out_write(
1*CLK_SRC_EXT_SEL | // use ext clk from sma 1*CLK_SRC_EXT_SEL | // 1= ext clk from sma, 0= RF backplane (IC46) to IC45
1*REF_CLK_SRC_SEL | 1*REF_CLK_SRC_SEL | // 1= low-noise clock, 0= Si5324 output (IC45) to HMC830
1*DAC_CLK_SRC_SEL | 1*DAC_CLK_SRC_SEL | // 1= HMC830 output, 1= clock mezzanine (IC54) to HMC7043 and J58/J59
0*REF_LO_CLK_SEL); 0*REF_LO_CLK_SEL); // 1= clock mezzanine, 0= HMC830 input (IC52) to AFEs and J56/J57
} }
} }
} }