forked from M-Labs/artiq
wrpll: use CONFIG_CLOCK_FREQUENCY and rtio_frequency in trim_dcxos
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@ -357,7 +357,8 @@ fn trim_dcxos(f_helper: u32, f_main: u32, f_cdr: u32) -> Result<(i32, i32), &'st
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const TIMER_WIDTH: u32 = 23;
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const COUNTER_DIV: u32 = 2;
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const F_SYS: f64 = 125.0e6;
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const F_SYS: f64 = csr::CONFIG_CLOCK_FREQUENCY as f64;
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#[cfg(rtio_frequency = "125.0")]
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const F_MAIN: f64 = 125.0e6;
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const F_HELPER: f64 = F_MAIN * ((1 << 15) as f64)/((1<<15) as f64 + 1.0);
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