forked from M-Labs/artiq
rtio: drive InputCollector.coarse_timestamp
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@ -102,3 +102,4 @@ class Core(Module, AutoCSR):
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quash_channels=quash_channels,
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quash_channels=quash_channels,
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interface=self.cri)
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interface=self.cri)
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self.submodules += inputs
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self.submodules += inputs
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self.comb += inputs.coarse_timestamp.eq(coarse_ts)
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