srenblad
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

sayma_amc: move bitstream options to migen 

close #930
This commit is contained in:
Robert Jördens 2018-03-02 18:10:57 +08:00
parent 5e074f83ac
commit ddcc68cff9
2 changed files with 1 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
artiq/gateware/targets/sayma_amc.py
View File

@ -146,11 +146,6 @@ class Standalone(MiniSoC, AMPSoC):
**kwargs)
AMPSoC.__init__(self)
platform = self.platform
platform.toolchain.bitstream_commands.extend([
"set_property BITSTREAM.GENERAL.COMPRESS True [current_design]",
"set_property CFGBVS VCCO [current_design]",
"set_property CONFIG_VOLTAGE 3.3 [current_design]",
])
# forward RTM UART to second FTDI UART channel
serial_1 = platform.request("serial", 1)

2
conda/artiq-dev/meta.yaml
View File

@ -14,7 +14,7 @@ requirements:
run:
- python >=3.5.3,<3.6
- setuptools 33.1.1
- migen 0.7 py35_10+git0996e0b
- migen 0.7 py35_14+git8fcd67a
- misoc 0.9 py35_20+git5fed1095
- jesd204b 0.5
- microscope