forked from M-Labs/artiq
sayma_amc: register RTM CSR regions from CSV
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54c75d3274
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@ -0,0 +1,40 @@
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from collections import OrderedDict
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from operator import itemgetter
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import csv
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from misoc.interconnect.csr import CSRStatus, CSRStorage
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def _get_csr_data(csv_file):
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csr_data = OrderedDict()
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with open(csv_file) as csv_file_f:
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csv_reader = csv.reader(csv_file_f)
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for name, address, length, ro in csv_reader:
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region_name, csr_name = name.split(".")
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address = int(address, 0)
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length = int(length, 0)
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ro = ro == "ro"
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if region_name not in csr_data:
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csr_data[region_name] = []
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csr_data[region_name].append((csr_name, address, length, ro))
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return csr_data
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def get_remote_csr_regions(offset, csv_file):
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regions = []
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for region_name, csrs_info in _get_csr_data(csv_file).items():
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csrs_info = sorted(csrs_info, key=itemgetter(1))
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origin = csrs_info[0][1]
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next_address = origin
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csrs = []
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for csr_name, address, length, ro in csrs_info:
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if address != next_address:
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raise ValueError("CSRs are not contiguous")
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next_address += 4*length
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if ro:
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csr = CSRStatus(32*length, name=csr_name)
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else:
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csr = CSRStorage(32*length, name=csr_name)
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csrs.append(csr)
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regions.append((region_name, offset + origin, 32, csrs))
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return regions
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@ -1,6 +1,7 @@
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#!/usr/bin/env python3
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#!/usr/bin/env python3
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import argparse
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import argparse
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import os
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from migen import *
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from migen import *
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@ -12,6 +13,7 @@ from misoc.targets.sayma_amc import MiniSoC
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from artiq.gateware.amp import AMPSoC, build_artiq_soc
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from artiq.gateware.amp import AMPSoC, build_artiq_soc
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from artiq.gateware import serwb
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from artiq.gateware import serwb
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from artiq.gateware import remote_csr
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from artiq.gateware import rtio
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from artiq.gateware import rtio
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from artiq.gateware.rtio.phy import ttl_simple
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from artiq.gateware.rtio.phy import ttl_simple
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from artiq import __version__ as artiq_version
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from artiq import __version__ as artiq_version
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@ -20,9 +22,9 @@ from artiq import __version__ as artiq_version
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class SaymaAMCStandalone(MiniSoC, AMPSoC):
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class SaymaAMCStandalone(MiniSoC, AMPSoC):
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mem_map = {
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mem_map = {
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"cri_con": 0x10000000,
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"cri_con": 0x10000000,
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"rtio": 0x20000000,
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"rtio": 0x11000000,
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"rtio_dma": 0x30000000,
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"rtio_dma": 0x12000000,
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"serwb": 0x20000000,
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"serwb": 0x13000000,
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"mailbox": 0x70000000
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"mailbox": 0x70000000
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}
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}
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mem_map.update(MiniSoC.mem_map)
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mem_map.update(MiniSoC.mem_map)
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@ -156,9 +158,19 @@ def main():
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description="ARTIQ device binary builder / Sayma AMC stand-alone")
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description="ARTIQ device binary builder / Sayma AMC stand-alone")
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builder_args(parser)
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builder_args(parser)
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soc_sdram_args(parser)
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soc_sdram_args(parser)
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parser.add_argument("--rtm-csr-csv",
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default=os.path.join("artiq_sayma_rtm", "sayma_rtm_csr.csv"),
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help="CSV file listing remote CSRs on RTM (default: %(default)s)")
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args = parser.parse_args()
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args = parser.parse_args()
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soc = SaymaAMCStandalone(**soc_sdram_argdict(args))
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soc = SaymaAMCStandalone(**soc_sdram_argdict(args))
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remote_csr_regions = remote_csr.get_remote_csr_regions(
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soc.mem_map["serwb"] | soc.shadow_base,
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args.rtm_csr_csv)
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for name, origin, busword, csrs in remote_csr_regions:
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soc.add_csr_region(name, origin, busword, csrs)
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build_artiq_soc(soc, builder_argdict(args))
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build_artiq_soc(soc, builder_argdict(args))
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