forked from M-Labs/artiq
Introduce compiler and device modules
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@ -1,6 +1,7 @@
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import inspect, textwrap, ast, types
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from artiq import units, unparse
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from artiq.language import units
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from artiq.compiler import unparse
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def find_kernel_body(node):
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while True:
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@ -196,11 +197,8 @@ def collapse(stmts):
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stmts[offset+location:offset+location+1] = new_stmts
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offset += len(new_stmts) - 1
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if __name__ == "__main__":
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import collapse_test
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kernel = collapse_test.collapse_test
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node = ast.parse(textwrap.dedent(inspect.getsource(kernel)))
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def transform(k_function, k_args, k_kwargs):
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node = ast.parse(textwrap.dedent(inspect.getsource(k_function)))
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node = find_kernel_body(node)
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explicit_delays(node)
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@ -0,0 +1,5 @@
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from artiq.compiler.transform import transform
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class Core:
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def run(self, k_function, *k_args, **k_kwargs):
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transform(k_function, k_args, k_kwargs)
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@ -0,0 +1,25 @@
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from artiq.language.experiment import *
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from artiq.language.units import *
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class DDS:
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def __init__(self, core, reg_channel, rtio_channel, latency=0*ps, phase_mode="continuous"):
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self.core = core
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self.reg_channel = reg_channel
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self.rtio_channel = rtio_channel
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self.latency = latency
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self.phase_mode = phase_mode
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self._previous_frequency = 0*MHz
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kernel_attr_ro = {"reg_channel", "rtio_channel", "latency", "phase_mode"}
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kernel_attr = {"_previous_frequency"}
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@kernel
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def pulse(self, frequency, duration):
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if self._previous_frequency != frequency:
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self.core.syscall("rtio_sync", self.rtio_channel) # wait until output is off
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self.core.syscall("dds_program", self.reg_channel, frequency)
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self._previous_frequency = frequency
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self.core.syscall("rtio_set", now()-self.latency, self.rtio_channel, 1)
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delay(duration)
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self.core.syscall("rtio_set", now()-self.latency, self.rtio_channel, 0)
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@ -1,6 +1,9 @@
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import itertools
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class Experiment:
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channels = ""
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parameters = ""
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def __init__(self, *args, **kwargs):
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channels = self.channels.split()
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parameters = self.parameters.split()
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@ -24,9 +27,9 @@ class Experiment:
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def kernel(arg):
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if isinstance(arg, str):
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def real_decorator(function):
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def real_decorator(k_function):
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def run_on_core(exp, *k_args, **k_kwargs):
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getattr(exp, arg).run(function, exp, *k_args, **k_kwargs)
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getattr(exp, arg).run(k_function, exp, *k_args, **k_kwargs)
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return run_on_core
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return real_decorator
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else:
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@ -4,8 +4,8 @@ from artiq.language import units
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from artiq.sim import time
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class Core:
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def run(self, function, *args, **kwargs):
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return function(*args, **kwargs)
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def run(self, k_function, *k_args, **k_kwargs):
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return k_function(*k_args, **k_kwargs)
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class Input:
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def __init__(self, name, prng_seed=None, wait_max=20, count_max=100, wait_min=0, count_min=0):
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@ -1,9 +0,0 @@
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def collapse_test():
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for i in range(3):
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with parallel:
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with sequential:
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pulse("a", 100*MHz, 20*us)
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pulse("b", 100*MHz, 10*us)
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with sequential:
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pulse("A", 100*MHz, 10*us)
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pulse("B", 100*MHz, 10*us)
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@ -0,0 +1,29 @@
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from artiq.language.units import *
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from artiq.language.experiment import *
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class CompilerTest(Experiment):
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channels = "core a b A B"
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@kernel
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def run():
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for i in range(3):
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with parallel:
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with sequential:
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self.a.pulse(100*MHz, 20*us)
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self.b.pulse(100*MHz, 10*us)
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with sequential:
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self.A.pulse(100*MHz, 10*us)
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self.B.pulse(100*MHz, 10*us)
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if __name__ == "__main__":
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from artiq.devices import core, core_dds
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coredev = core.Core()
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exp = CompilerTest(
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core=coredev,
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a=core_dds.DDS(coredev, 0, 0),
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b=core_dds.DDS(coredev, 1, 1),
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A=core_dds.DDS(coredev, 2, 2),
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B=core_dds.DDS(coredev, 3, 3)
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)
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exp.run()
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