forked from M-Labs/artiq
coredevice.ttl: update for new int semantics.
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9936768603
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@ -36,7 +36,7 @@ class TTLOut:
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self.channel = channel
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# in RTIO cycles
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self.o_previous_timestamp = int64(0)
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self.o_previous_timestamp = int(0, width=64)
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@kernel
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def set_o(self, o):
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@ -100,8 +100,8 @@ class TTLInOut:
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self.channel = channel
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# in RTIO cycles
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self.o_previous_timestamp = int64(0)
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self.i_previous_timestamp = int64(0)
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self.o_previous_timestamp = int(0, width=64)
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self.i_previous_timestamp = int(0, width=64)
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@kernel
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def set_oe(self, oe):
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@ -240,7 +240,7 @@ class TTLClockGen:
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def build(self):
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# in RTIO cycles
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self.previous_timestamp = int64(0)
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self.previous_timestamp = int(0, width=64)
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self.acc_width = 24
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@portable
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