From 9605e8215fea0bac8909585ccdc32fe4f36e66d1 Mon Sep 17 00:00:00 2001 From: whitequark Date: Fri, 28 Aug 2015 02:11:26 -0500 Subject: [PATCH] coredevice.ttl: update for new int semantics. --- artiq/coredevice/ttl.py | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/artiq/coredevice/ttl.py b/artiq/coredevice/ttl.py index ffc3ca0c4..59e6f6bd0 100644 --- a/artiq/coredevice/ttl.py +++ b/artiq/coredevice/ttl.py @@ -36,7 +36,7 @@ class TTLOut: self.channel = channel # in RTIO cycles - self.o_previous_timestamp = int64(0) + self.o_previous_timestamp = int(0, width=64) @kernel def set_o(self, o): @@ -100,8 +100,8 @@ class TTLInOut: self.channel = channel # in RTIO cycles - self.o_previous_timestamp = int64(0) - self.i_previous_timestamp = int64(0) + self.o_previous_timestamp = int(0, width=64) + self.i_previous_timestamp = int(0, width=64) @kernel def set_oe(self, oe): @@ -240,7 +240,7 @@ class TTLClockGen: def build(self): # in RTIO cycles - self.previous_timestamp = int64(0) + self.previous_timestamp = int(0, width=64) self.acc_width = 24 @portable