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kasli/sysu: add comments

This commit is contained in:
Sebastien Bourdeauducq 2018-04-17 18:46:55 +08:00
parent 142561c4bd
commit 756e120c27
1 changed files with 2 additions and 0 deletions
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2
artiq/gateware/targets/kasli.py
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@ -549,6 +549,7 @@ class SYSU(_StandaloneBase):
# EEM clock fan-out from Si5324, not MMCX # EEM clock fan-out from Si5324, not MMCX
self.comb += platform.request("clk_sel").eq(1) self.comb += platform.request("clk_sel").eq(1)
# EEM2-6: TTL
rtio_channels = [] rtio_channels = []
for i in range(40): for i in range(40):
eem_offset, port = divmod(i, 8) eem_offset, port = divmod(i, 8)
@ -557,6 +558,7 @@ class SYSU(_StandaloneBase):
self.submodules += phy self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(phy)) rtio_channels.append(rtio.Channel.from_phy(phy))
# EEM0, EEM1: Urukul
phy = spi2.SPIMaster(self.platform.request("eem1_spi_p"), phy = spi2.SPIMaster(self.platform.request("eem1_spi_p"),
self.platform.request("eem1_spi_n")) self.platform.request("eem1_spi_n"))
self.submodules += phy self.submodules += phy