From 756e120c270b038db9fecd3490381ed0931ce230 Mon Sep 17 00:00:00 2001
From: Sebastien Bourdeauducq <sb@m-labs.hk>
Date: Tue, 17 Apr 2018 18:46:55 +0800
Subject: [PATCH] kasli/sysu: add comments

---
 artiq/gateware/targets/kasli.py | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/artiq/gateware/targets/kasli.py b/artiq/gateware/targets/kasli.py
index b9f8320bb..b90680470 100755
--- a/artiq/gateware/targets/kasli.py
+++ b/artiq/gateware/targets/kasli.py
@@ -549,6 +549,7 @@ class SYSU(_StandaloneBase):
         # EEM clock fan-out from Si5324, not MMCX
         self.comb += platform.request("clk_sel").eq(1)
 
+        # EEM2-6: TTL
         rtio_channels = []
         for i in range(40):
             eem_offset, port = divmod(i, 8)
@@ -557,6 +558,7 @@ class SYSU(_StandaloneBase):
             self.submodules += phy
             rtio_channels.append(rtio.Channel.from_phy(phy))
 
+        # EEM0, EEM1: Urukul
         phy = spi2.SPIMaster(self.platform.request("eem1_spi_p"),
                 self.platform.request("eem1_spi_n"))
         self.submodules += phy