forked from M-Labs/artiq
runtime/rtio: fix rtio_input_wait(), add RTIOTimeout
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@ -1,12 +1,13 @@
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from artiq.coredevice import exceptions, dds
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from artiq.coredevice import exceptions, dds, spi
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from artiq.coredevice.exceptions import (RTIOUnderflow, RTIOSequenceError,
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RTIOCollisionError, RTIOOverflow,
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DDSBatchError, CacheError)
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DDSBatchError, CacheError,
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RTIOTimeout)
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from artiq.coredevice.dds import (PHASE_MODE_CONTINUOUS, PHASE_MODE_ABSOLUTE,
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PHASE_MODE_TRACKING)
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__all__ = []
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__all__ += ["RTIOUnderflow", "RTIOSequenceError", "RTIOCollisionError",
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"RTIOOverflow", "DDSBatchError", "CacheError"]
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"RTIOOverflow", "DDSBatchError", "CacheError", "RTIOTimeout"]
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__all__ += ["PHASE_MODE_CONTINUOUS", "PHASE_MODE_ABSOLUTE",
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"PHASE_MODE_TRACKING"]
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@ -108,6 +108,17 @@ class RTIOOverflow(Exception):
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"""
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artiq_builtin = True
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class RTIOTimeout(Exception):
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"""Raised when an RTIO input operation does not complete within the expected
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time. This is only raised by channels where a response is guaranteed, such
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as RT2WB (DDS and SPI).
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This does not interrupt operations further than cancelling the current read
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attempt. Reading can be reattempted after the exception is caught, and
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events that have arrived in the meantime will be retrieved.
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"""
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artiq_builtin = True
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class DDSBatchError(Exception):
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"""Raised when attempting to start a DDS batch while already in a batch,
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or when too many commands are batched.
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@ -16,8 +16,20 @@ unsigned int rt2wb_read_sync(long long int timestamp, int channel, int addr,
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int duration)
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{
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unsigned int data;
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int status;
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rtio_output(timestamp, channel, addr, 0);
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rtio_input_wait(timestamp + duration, channel);
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status = rtio_input_wait(timestamp + duration, channel);
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if (status & RTIO_I_STATUS_OVERFLOW)
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artiq_raise_from_c("RTIOOverflow",
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"RT2WB read overflow on channel {0}",
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channel, 0, 0);
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if (status & RTIO_I_STATUS_EMPTY)
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artiq_raise_from_c("RTIOTimeout",
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"RT2WB read timeout on channel {0}",
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channel, 0, 0);
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data = rtio_i_data_read();
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rtio_i_re_write(1);
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return data;
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@ -51,7 +51,7 @@ void rtio_output(long long int timestamp, int channel, unsigned int addr,
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}
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void rtio_input_wait(long long int timeout, int channel)
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int rtio_input_wait(long long int timeout, int channel)
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{
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int status;
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@ -59,21 +59,19 @@ void rtio_input_wait(long long int timeout, int channel)
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while((status = rtio_i_status_read())) {
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if(status & RTIO_I_STATUS_OVERFLOW) {
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rtio_i_overflow_reset_write(1);
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artiq_raise_from_c("RTIOOverflow",
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"RTIO input overflow on channel {0}",
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channel, 0, 0);
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break;
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}
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if(rtio_get_counter() >= timeout) {
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/* check empty flag again to prevent race condition.
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* now we are sure that the time limit has been exceeded.
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*/
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if(rtio_i_status_read() & RTIO_I_STATUS_EMPTY)
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artiq_raise_from_c("InternalError",
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"RTIO input timeout on channel {0}",
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channel, 0, 0);
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status = rtio_i_status_read();
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if(status & RTIO_I_STATUS_EMPTY)
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break;
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}
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/* input FIFO is empty - keep waiting */
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}
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return status;
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}
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@ -19,7 +19,7 @@ void rtio_log(long long int timestamp, const char *format, ...);
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void rtio_log_va(long long int timestamp, const char *format, va_list args);
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void rtio_output(long long int timestamp, int channel, unsigned int address,
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unsigned int data);
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void rtio_input_wait(long long int timeout, int channel);
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int rtio_input_wait(long long int timeout, int channel);
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static inline void rtio_write_and_process_status(long long int timestamp, int channel)
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{
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@ -22,8 +22,15 @@ void ttl_set_sensitivity(long long int timestamp, int channel, int sensitivity)
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long long int ttl_get(int channel, long long int time_limit)
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{
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long long int r;
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int status = rtio_input_wait(time_limit, channel);
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if (status & RTIO_I_STATUS_OVERFLOW)
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artiq_raise_from_c("RTIOOverflow",
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"RTIO input overflow on channel {0}",
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channel, 0, 0);
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if (status & RTIO_I_STATUS_EMPTY)
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return -1;
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rtio_input_wait(time_limit, channel);
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r = rtio_i_timestamp_read();
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rtio_i_re_write(1);
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return r;
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