forked from M-Labs/artiq
Basic SoC and runtime design
This commit is contained in:
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71323fb7cd
commit
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include $(MSCDIR)/software/common.mak
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BOARD=papilio_pro
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SERIAL=/dev/ttyUSB1
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OBJECTS=esr.o elf_loader.o main.o
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all: runtime.bin
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# pull in dependency info for *existing* .o files
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-include $(OBJECTS:.o=.d)
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%.bin: %.elf
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$(OBJCOPY) -O binary $< $@
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chmod -x $@
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%.fbi: %.bin
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$(MSCDIR)/mkmscimg.py -f -o $@ $<
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runtime.elf: $(OBJECTS) libs
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%.elf:
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$(LD) $(LDFLAGS) \
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-T $(MSCDIR)/software/libbase/linker-sdram.ld \
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-N -o $@ \
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$(MSCDIR)/software/libbase/crt0-$(CPU).o \
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$(OBJECTS) \
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-L$(MSCDIR)/software/libbase \
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-L$(MSCDIR)/software/libcompiler-rt \
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-lbase -lcompiler-rt
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chmod -x $@
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main.o: main.c
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$(compile-dep)
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%.o: %.c
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$(compile-dep)
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%.o: %.S
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$(assemble)
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libs:
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$(MAKE) -C $(MSCDIR)/software/libcompiler-rt
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$(MAKE) -C $(MSCDIR)/software/libbase
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load: runtime.bin
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$(MAKE) -C $(MSCDIR)/tools
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$(MSCDIR)/tools/flterm --port $(SERIAL) --kernel runtime.bin
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flash: runtime.fbi
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$(MSCDIR)/flash_extra.py $(BOARD) runtime.fbi 0x70000
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clean:
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$(RM) $(OBJECTS) $(OBJECTS:.o=.d) runtime.elf runtime.bin runtime.fbi .*~ *~
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.PHONY: all main.o clean libs load
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#include <stdio.h>
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#include <string.h>
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#include "elf_loader.h"
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#define EI_NIDENT 16
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struct elf32_ehdr {
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unsigned char ident[EI_NIDENT]; /* ident bytes */
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unsigned short type; /* file type */
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unsigned short machine; /* target machine */
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unsigned int version; /* file version */
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unsigned int entry; /* start address */
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unsigned int phoff; /* phdr file offset */
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unsigned int shoff; /* shdr file offset */
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unsigned int flags; /* file flags */
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unsigned short ehsize; /* sizeof ehdr */
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unsigned short phentsize; /* sizeof phdr */
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unsigned short phnum; /* number phdrs */
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unsigned short shentsize; /* sizeof shdr */
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unsigned short shnum; /* number shdrs */
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unsigned short shstrndx; /* shdr string index */
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} __attribute__((packed));
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static const unsigned char elf_magic_header[] = {
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0x7f, 0x45, 0x4c, 0x46, /* 0x7f, 'E', 'L', 'F' */
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0x01, /* Only 32-bit objects. */
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0x02, /* Only big-endian. */
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0x01, /* Only ELF version 1. */
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};
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#define ET_NONE 0 /* Unknown type. */
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#define ET_REL 1 /* Relocatable. */
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#define ET_EXEC 2 /* Executable. */
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#define ET_DYN 3 /* Shared object. */
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#define ET_CORE 4 /* Core file. */
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#define EM_OR1K 0x005c
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struct elf32_shdr {
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unsigned int name; /* section name */
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unsigned int type; /* SHT_... */
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unsigned int flags; /* SHF_... */
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unsigned int addr; /* virtual address */
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unsigned int offset; /* file offset */
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unsigned int size; /* section size */
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unsigned int link; /* misc info */
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unsigned int info; /* misc info */
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unsigned int addralign; /* memory alignment */
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unsigned int entsize; /* entry size if table */
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} __attribute__((packed));
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#define SHT_NULL 0 /* inactive */
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#define SHT_PROGBITS 1 /* program defined information */
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#define SHT_SYMTAB 2 /* symbol table section */
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#define SHT_STRTAB 3 /* string table section */
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#define SHT_RELA 4 /* relocation section with addends*/
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#define SHT_HASH 5 /* symbol hash table section */
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#define SHT_DYNAMIC 6 /* dynamic section */
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#define SHT_NOTE 7 /* note section */
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#define SHT_NOBITS 8 /* no space section */
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#define SHT_REL 9 /* relation section without addends */
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#define SHT_SHLIB 10 /* reserved - purpose unknown */
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#define SHT_DYNSYM 11 /* dynamic symbol table section */
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#define SHT_LOPROC 0x70000000 /* reserved range for processor */
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#define SHT_HIPROC 0x7fffffff /* specific section header types */
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#define SHT_LOUSER 0x80000000 /* reserved range for application */
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#define SHT_HIUSER 0xffffffff /* specific indexes */
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struct elf32_name {
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char name[12];
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} __attribute__((packed));
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#define SANITIZE_OFFSET_SIZE(offset, size) \
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if(offset > 0x10000000) \
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return 0; \
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if((offset + size) > elf_length) \
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return 0
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#define GET_POINTER_SAFE(target, target_type, offset) \
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SANITIZE_OFFSET_SIZE(offset, sizeof(target_type)); \
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target = (target_type *)((char *)elf_data + offset)
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int load_elf(void *elf_data, int elf_length, void *dest, int dest_length)
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{
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struct elf32_ehdr *ehdr;
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struct elf32_shdr *strtable;
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struct elf32_shdr *shdr;
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struct elf32_name *name;
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unsigned int shdrptr;
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int i;
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unsigned int textoff;
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unsigned int textsize;
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GET_POINTER_SAFE(ehdr, struct elf32_ehdr, 0);
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if(memcmp(ehdr->ident, elf_magic_header, sizeof(elf_magic_header)) != 0)
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return 0;
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if(ehdr->type != ET_REL) return 0;
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if(ehdr->machine != EM_OR1K) return 0;
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GET_POINTER_SAFE(strtable, struct elf32_shdr, ehdr->shoff + ehdr->shentsize*ehdr->shstrndx);
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textoff = textsize = 0;
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shdrptr = ehdr->shoff;
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for(i=0;i<ehdr->shnum;i++) {
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GET_POINTER_SAFE(shdr, struct elf32_shdr, shdrptr);
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GET_POINTER_SAFE(name, struct elf32_name, strtable->offset + shdr->name);
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if(strncmp(name->name, ".text", 5) == 0) {
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textoff = shdr->offset;
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textsize = shdr->size;
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}
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shdrptr += ehdr->shentsize;
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}
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SANITIZE_OFFSET_SIZE(textoff, textsize);
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if(textsize > dest_length)
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return 0;
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memcpy(dest, (char *)elf_data + textoff, textsize);
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return 1;
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}
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#ifndef __ELF_LOADER_H
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#define __ELF_LOADER_H
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int load_elf(void *elf_data, int elf_length, void *dest, int dest_length);
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#endif /* __ELF_LOADER_H */
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#include <generated/csr.h>
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#include <irq.h>
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#include <uart.h>
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static void isr(void)
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{
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unsigned int irqs;
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irqs = irq_pending() & irq_getmask();
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if(irqs & (1 << UART_INTERRUPT))
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uart_isr();
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}
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#define EXTERNAL_IRQ 0x800
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#define SYSTEM_CALL 0xc00
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void exception_handler(unsigned long vect, unsigned long *sp);
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void exception_handler(unsigned long vect, unsigned long *sp)
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{
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vect &= 0xf00;
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if(vect == SYSTEM_CALL) {
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puts("scall");
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} else if(vect == EXTERNAL_IRQ) {
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isr();
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} else {
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/* Unhandled exception */
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for(;;);
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}
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}
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <irq.h>
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#include <uart.h>
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#include <console.h>
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#include <system.h>
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#include <generated/csr.h>
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#include "elf_loader.h"
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static void receive_sync(void)
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{
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char c;
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int recognized;
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recognized = 0;
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while(1) {
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c = readchar();
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if(c == 0x5a) {
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recognized++;
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if(recognized == 4)
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return;
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} else
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recognized = 0;
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}
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}
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static int receive_length(void)
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{
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int r, i;
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r = 0;
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for(i=0;i<4;i++) {
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r <<= 8;
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r |= readchar();
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}
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return r;
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}
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static int download_kernel(void *buffer, int maxlength)
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{
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int length;
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int i;
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unsigned char *_buffer = buffer;
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receive_sync();
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length = receive_length();
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if(length > maxlength)
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return -1;
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for(i=0;i<length;i++)
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_buffer[i] = readchar();
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return length;
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}
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typedef void (*kernel_function)(int);
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int main(void)
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{
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unsigned char kbuf[256*1024];
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unsigned char kcode[256*1024];
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kernel_function k = (kernel_function)kcode;
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int i;
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int length;
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irq_setmask(0);
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irq_setie(1);
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uart_init();
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puts("ARTIQ runtime built "__DATE__" "__TIME__"\n");
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while(1) {
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length = download_kernel(kbuf, sizeof(kbuf));
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if(length > 0) {
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load_elf(kbuf, length, kcode, sizeof(kcode));
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flush_cpu_icache();
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for(i=0;i<20;i++) {
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printf("=== %2d ===\n", i);
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readchar();
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k(i);
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}
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}
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}
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return 0;
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}
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from fractions import Fraction
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from migen.fhdl.std import *
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from misoclib import lasmicon, spiflash
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from misoclib.sdramphy import gensdrphy
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from misoclib.gensoc import SDRAMSoC
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class _CRG(Module):
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def __init__(self, platform, clk_freq):
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self.clock_domains.cd_sys = ClockDomain()
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self.clock_domains.cd_sys_ps = ClockDomain()
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f0 = 32*1000*1000
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clk32 = platform.request("clk32")
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clk32a = Signal()
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self.specials += Instance("IBUFG", i_I=clk32, o_O=clk32a)
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clk32b = Signal()
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self.specials += Instance("BUFIO2", p_DIVIDE=1,
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p_DIVIDE_BYPASS="TRUE", p_I_INVERT="FALSE",
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i_I=clk32a, o_DIVCLK=clk32b)
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f = Fraction(int(clk_freq), int(f0))
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n, m, p = f.denominator, f.numerator, 8
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assert f0/n*m == clk_freq
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pll_lckd = Signal()
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pll_fb = Signal()
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pll = Signal(6)
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self.specials.pll = Instance("PLL_ADV", p_SIM_DEVICE="SPARTAN6",
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p_BANDWIDTH="OPTIMIZED", p_COMPENSATION="INTERNAL",
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p_REF_JITTER=.01, p_CLK_FEEDBACK="CLKFBOUT",
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i_DADDR=0, i_DCLK=0, i_DEN=0, i_DI=0, i_DWE=0, i_RST=0, i_REL=0,
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p_DIVCLK_DIVIDE=1, p_CLKFBOUT_MULT=m*p//n, p_CLKFBOUT_PHASE=0.,
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i_CLKIN1=clk32b, i_CLKIN2=0, i_CLKINSEL=1,
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p_CLKIN1_PERIOD=1/f0, p_CLKIN2_PERIOD=0.,
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i_CLKFBIN=pll_fb, o_CLKFBOUT=pll_fb, o_LOCKED=pll_lckd,
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o_CLKOUT0=pll[0], p_CLKOUT0_DUTY_CYCLE=.5,
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o_CLKOUT1=pll[1], p_CLKOUT1_DUTY_CYCLE=.5,
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o_CLKOUT2=pll[2], p_CLKOUT2_DUTY_CYCLE=.5,
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o_CLKOUT3=pll[3], p_CLKOUT3_DUTY_CYCLE=.5,
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o_CLKOUT4=pll[4], p_CLKOUT4_DUTY_CYCLE=.5,
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o_CLKOUT5=pll[5], p_CLKOUT5_DUTY_CYCLE=.5,
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p_CLKOUT0_PHASE=0., p_CLKOUT0_DIVIDE=p//1,
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p_CLKOUT1_PHASE=0., p_CLKOUT1_DIVIDE=p//1,
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p_CLKOUT2_PHASE=0., p_CLKOUT2_DIVIDE=p//1,
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p_CLKOUT3_PHASE=0., p_CLKOUT3_DIVIDE=p//1,
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p_CLKOUT4_PHASE=0., p_CLKOUT4_DIVIDE=p//1, # sys
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p_CLKOUT5_PHASE=270., p_CLKOUT5_DIVIDE=p//1, # sys_ps
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)
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self.specials += Instance("BUFG", i_I=pll[4], o_O=self.cd_sys.clk)
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self.specials += Instance("BUFG", i_I=pll[5], o_O=self.cd_sys_ps.clk)
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self.specials += Instance("FD", p_INIT=1, i_D=~pll_lckd,
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i_C=self.cd_sys.clk, o_Q=self.cd_sys.rst)
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self.specials += Instance("ODDR2", p_DDR_ALIGNMENT="NONE",
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p_INIT=0, p_SRTYPE="SYNC",
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i_D0=0, i_D1=1, i_S=0, i_R=0, i_CE=1,
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i_C0=self.cd_sys.clk, i_C1=~self.cd_sys.clk,
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o_Q=platform.request("sdram_clock"))
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class ARTIQSoC(SDRAMSoC):
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default_platform = "papilio_pro"
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def __init__(self, platform, cpu_type="or1k", **kwargs):
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clk_freq = 80*1000*1000
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SDRAMSoC.__init__(self, platform, clk_freq,
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cpu_reset_address=0x160000, cpu_type=cpu_type, **kwargs)
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self.submodules.crg = _CRG(platform, clk_freq)
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sdram_geom = lasmicon.GeomSettings(
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bank_a=2,
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row_a=12,
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col_a=8
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)
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sdram_timing = lasmicon.TimingSettings(
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tRP=self.ns(15),
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tRCD=self.ns(15),
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tWR=self.ns(14),
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tWTR=2,
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tREFI=self.ns(64*1000*1000/4096, False),
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tRFC=self.ns(66),
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req_queue_size=8,
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read_time=32,
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write_time=16
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)
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self.submodules.sdrphy = gensdrphy.GENSDRPHY(platform.request("sdram"))
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self.register_sdram_phy(self.sdrphy.dfi, self.sdrphy.phy_settings, sdram_geom, sdram_timing)
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# BIOS is in SPI flash
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self.submodules.spiflash = spiflash.SpiFlash(platform.request("spiflash2x"),
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cmd=0xefef, cmd_width=16, addr_width=24, dummy=4, div=4)
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self.flash_boot_address = 0x70000
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self.register_rom(self.spiflash.bus)
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default_subtarget = ARTIQSoC
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