forked from M-Labs/artiq
compiler: system calls
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@ -61,7 +61,7 @@ def _emit_expr(builder, ns, node):
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else:
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raise NotImplementedError
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def _emit_statements(builder, ns, stmts):
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def _emit_statements(env, builder, ns, stmts):
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for stmt in stmts:
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if isinstance(stmt, ast.Return):
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val = _emit_expr(builder, ns, stmt.value)
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@ -83,11 +83,11 @@ def _emit_statements(builder, ns, stmts):
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builder.cbranch(condition, then_block, else_block)
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builder.position_at_end(then_block)
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_emit_statements(builder, ns, stmt.body)
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_emit_statements(env, builder, ns, stmt.body)
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builder.branch(merge_block)
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builder.position_at_end(else_block)
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_emit_statements(builder, ns, stmt.orelse)
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_emit_statements(env, builder, ns, stmt.orelse)
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builder.branch(merge_block)
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builder.position_at_end(merge_block)
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@ -101,19 +101,25 @@ def _emit_statements(builder, ns, stmts):
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builder.cbranch(condition, body_block, else_block)
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builder.position_at_end(body_block)
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_emit_statements(builder, ns, stmt.body)
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_emit_statements(env, builder, ns, stmt.body)
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condition = _emit_expr(builder, ns, stmt.test)
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builder.cbranch(condition, body_block, merge_block)
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builder.position_at_end(else_block)
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_emit_statements(builder, ns, stmt.orelse)
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_emit_statements(env, builder, ns, stmt.orelse)
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builder.branch(merge_block)
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builder.position_at_end(merge_block)
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elif isinstance(stmt, ast.Expr) and isinstance(stmt.value, ast.Call):
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call = stmt.value
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if call.func.id == "syscall":
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env.emit_syscall(builder, call.args[0].s, [])
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else:
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raise NotImplementedError
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else:
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raise NotImplementedError
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def _emit_function_def(module, node):
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def _emit_function_def(env, module, node):
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function_type = lc.Type.function(lc.Type.int(), [lc.Type.int()]*len(node.args.args))
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function = module.add_function(function_type, node.name)
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bb = function.append_basic_block("entry")
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@ -124,27 +130,34 @@ def _emit_function_def(module, node):
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llvm_arg.name = ast_arg.arg
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ns.store(builder, llvm_arg, ast_arg.arg)
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_emit_statements(builder, ns, node.body)
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_emit_statements(env, builder, ns, node.body)
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if __name__ == "__main__":
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from llvm import target as lt
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from llvm import passes as lp
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import subprocess
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from artiq.devices import runtime
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testcode = """
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def is_prime(x):
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def run():
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x = 37
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d = 2
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prime = 1
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while d*d <= x:
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if x % d == 0:
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return 0
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prime = 0
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d = d + 1
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return 1
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syscall("rpc")
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if prime == 1:
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syscall("rpc")
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return prime
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"""
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node = ast.parse(testcode)
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fdef = node.body[0]
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my_module = lc.Module.new("my_module")
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_emit_function_def(my_module, fdef)
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module = lc.Module.new("main")
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_emit_function_def(runtime.Environment(), module, fdef)
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pass_manager = lp.PassManager.new()
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pass_manager.add(lp.PASS_MEM2REG)
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@ -152,18 +165,18 @@ def is_prime(x):
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pass_manager.add(lp.PASS_REASSOCIATE)
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pass_manager.add(lp.PASS_GVN)
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pass_manager.add(lp.PASS_SIMPLIFYCFG)
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pass_manager.run(my_module)
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pass_manager.run(module)
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lt.initialize_all()
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tm = lt.TargetMachine.new(triple="or1k", cpu="generic")
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with open("test.out", "wb") as fout:
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objfile = tm.emit_object(my_module)
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objfile = tm.emit_object(module)
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fout.write(objfile)
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print("=========================")
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print(" LLVM IR")
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print("=========================")
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print(my_module)
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print(module)
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print("")
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print("=========================")
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@ -0,0 +1,22 @@
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from llvm import core as lc
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syscall_map = {
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"rpc": 0,
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"rtio_set": 1,
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"rtio_sync": 2,
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"dds_program": 3,
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}
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class Environment:
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def emit_syscall(self, builder, syscall_name, args):
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syscall_nr = syscall_map[syscall_name]
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assert(0 <= syscall_nr <= 0xffff)
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# FIXME: replace with "l.sys syscall_nr" after the LLVM problems are fixed
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opcode = 0x20000000 | syscall_nr
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asm_string = "\n".join(".byte 0x{:02x}".format((opcode >> 8*i) & 0xff)
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for i in reversed(range(4)))
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sc_type = lc.Type.function(lc.Type.void(), [])
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asm = lc.InlineAsm.get(sc_type, asm_string, "")
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builder.call(asm, [])
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