forked from M-Labs/artiq
sayma_amc: SFP TX disable is active-high
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77192256ea
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296ac35f5d
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@ -295,7 +295,7 @@ class Master(MiniSoC, AMPSoC):
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self.config["HAS_SI5324"] = None
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self.config["HAS_SI5324"] = None
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self.config["SI5324_FREE_RUNNING"] = None
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self.config["SI5324_FREE_RUNNING"] = None
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self.comb += platform.request("sfp_tx_disable_n", 0).eq(1)
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self.comb += platform.request("sfp_tx_disable", 0).eq(0)
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self.submodules.transceiver = gth_ultrascale.GTH(
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self.submodules.transceiver = gth_ultrascale.GTH(
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clock_pads=platform.request("si5324_clkout"),
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clock_pads=platform.request("si5324_clkout"),
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data_pads=[platform.request("sfp", 0)],
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data_pads=[platform.request("sfp", 0)],
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@ -395,7 +395,7 @@ class Satellite(BaseSoC):
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self.submodules.rtio_moninj = rtio.MonInj(rtio_channels)
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self.submodules.rtio_moninj = rtio.MonInj(rtio_channels)
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self.csr_devices.append("rtio_moninj")
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self.csr_devices.append("rtio_moninj")
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self.comb += platform.request("sfp_tx_disable_n", 0).eq(1)
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self.comb += platform.request("sfp_tx_disable", 0).eq(0)
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self.submodules.transceiver = gth_ultrascale.GTH(
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self.submodules.transceiver = gth_ultrascale.GTH(
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clock_pads=platform.request("si5324_clkout"),
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clock_pads=platform.request("si5324_clkout"),
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data_pads=[platform.request("sfp", 0)],
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data_pads=[platform.request("sfp", 0)],
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