e1b2c45813
kasli_soc & zc706: Fix GTX Clock Path during INIT
2023-11-07 18:55:08 +08:00
e6372b9766
zynq_clocking: Allow ext signal to set cur_clk csr
...
- for example, current_clock csr can be connected to tx_init.done
2023-11-07 18:55:08 +08:00
07044752b6
zynq_clocking: add ext_async_rst to AsyncRstSYNCR
2023-11-07 18:55:08 +08:00
79fc5a7789
zynq_clocking: expose mmcm_locked for SYSCRG
...
- mmcm_locked -> self.mmcm_locked
2023-11-07 18:55:08 +08:00
6c8346ca5f
subkernel: improve stability,
...
fix exception on awaiting message
2023-11-02 16:58:34 +08:00
b76f634686
drtio: increase robustness for longer payloads
2023-11-02 14:48:52 +08:00
4a34777b97
refactor i2c, io_expander, task under the same cfg
2023-10-25 11:52:04 +08:00
43e4527392
fix kasli-soc demo compilation warning
2023-10-25 11:45:13 +08:00
0a3bfc9a61
subkernel: separate tags and data
2023-10-18 12:03:43 +08:00
d3fbfd75b0
Fix grabber build and warning
...
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-10-18 11:24:43 +08:00
b768d5648c
Add grabber module
...
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-10-16 14:35:20 +08:00
812aea33b3
rustfmt
2023-10-11 17:56:30 +08:00
136e24f597
kasli-soc: Add BUFG to the IBUFGDS for MMCM CLKIN1
...
- Fix Vivado Compilation Error [DRC REQP-119]
- MMCME2_ADV CLKIN1 and CLKIN2 are now driven from the same source type (BUFG)
2023-10-11 16:45:26 +08:00
a4d1be00c0
Firmware: Add drtio_eem.rs support
...
- Port from Artiq repo
- Initialize the drtio_eem on main, rtio_clocking
- Driver for eem_transceiver
2023-10-10 11:22:05 +08:00
b15322b6ba
kasli_soc: Add support for shuttler on gateware
...
- Port from artiq repo
- Add EEM_DRTIO gateware
2023-10-10 11:22:05 +08:00
8fd1306145
zynq_clocking: Add sys5x, 208MHz CLK & IDELAYCTRL
...
- Port from artiq repo
- Generate sys5x for for EEM Serdes, 208MHz REF Clock for IDELAYCTRL
- Add IDELAYCTRL for IDEALYE2 in EEM Serdes
2023-10-10 11:21:34 +08:00
a28a819b18
add manifests target to PHONY
2023-10-09 18:29:53 +08:00
3f414278e2
cleanup
2023-10-09 18:28:20 +08:00
e5aafad60d
force cargo to use our copy of zynq-rs
2023-10-09 18:27:58 +08:00
b9a0bcabeb
ksupport: fix build on acpki variants
2023-10-09 17:10:45 +08:00
8eb359ee42
cargo fmt
2023-10-09 11:50:47 +08:00
7263862fd8
satellite: support optional args
2023-10-09 11:42:51 +08:00
29cc0a6e28
ddma/subkernel: fix wrong destination reported
2023-10-09 11:42:51 +08:00
616c40429e
satellite: process kernel requests more often
2023-10-09 11:42:51 +08:00
3ea8147966
subkernel: send async statuses when requested
2023-10-09 11:42:51 +08:00
cb79c12284
satellite: support subkernels
2023-10-09 11:42:51 +08:00
623cc7b79e
libkernel -> ksupport
2023-10-09 11:42:51 +08:00
49205eea17
satellite gateware: add kernel rtio to cri
2023-10-09 11:36:23 +08:00
6885c618b5
move kernel-related code to separate library
2023-10-09 11:36:23 +08:00
c696fd826f
master: support optional args
2023-10-09 10:35:47 +08:00
4b3c9a3d08
rtio_mgt: remove support for async messages
2023-10-09 10:35:47 +08:00
779aea7c6a
check subkernel exceptions only when awaited
2023-10-09 10:35:03 +08:00
6785ca2c85
subkernel: port master support
2023-10-09 10:35:03 +08:00
656cbf4546
kasli_soc: use sed_lanes value from HW description
...
https://github.com/m-labs/artiq/pull/1745 added a field for setting the number of SED lanes to the HW description. This commit makes it so that the setting is used for Kasli Soc as well.
2023-10-06 15:37:56 +01:00
ecd4ca333c
rtio_clocking: inform the user if PLL is bypassed
2023-10-06 16:27:25 +08:00
ae3099dd8e
kasli_soc: support 100MHz clock
2023-10-06 16:27:25 +08:00
49810da188
runtime: wait longer for PLL lock
2023-10-05 12:17:43 +08:00
e451598a06
satman: fix dma reporting wrong destination
2023-09-22 10:29:48 +08:00
f4ceca464f
drtio: change async messages to sync
2023-09-21 14:18:25 +08:00
f3dcd53086
firmware: fix zc706 compilation warnings
...
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
2023-09-11 15:21:56 +08:00
b3856e879b
refactor write_rustc_cfg_file()
2023-09-11 11:48:19 +08:00
1ccae0d442
consolidate all write..file() into config.py
2023-09-11 11:48:19 +08:00
2c19f4ac31
replace rustc_cfg[ ] & change write_rustc_cfg_file
2023-09-11 11:48:19 +08:00
85ecff2cc1
cargo: update zynq-rs
2023-09-07 19:01:36 +08:00
3a305c8cac
Revert "cargo: update dependencies"
...
This reverts commit 38b0799bb0
2023-09-07 19:00:16 +08:00
38b0799bb0
cargo: update dependencies
2023-09-07 18:54:30 +08:00
615f2e3d37
remove misleading 'Actively' from docs at main.rs
2023-09-06 10:53:26 +08:00
37df7fd45b
cargo fmt
2023-08-30 16:14:35 +08:00
2ac7eedec1
firmware: fix compilation without virtual LEDs
...
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
2023-08-30 15:33:44 +08:00
MorganTL
c61017fbe6
fix compiling error when cfg has has_rtio_moninj
2023-08-30 15:32:09 +08:00
MorganTL
0e6309b95e
change write_rustc_cfg_file to follow artiq repo
2023-08-30 14:56:12 +08:00
1516327c26
firmware: fix zc706 compilation error
...
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
2023-08-29 11:25:28 +08:00
622d267d55
add virtual LEDs, improve IO expander setup, drive TX_DISABLE
...
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
2023-08-28 16:08:10 +08:00
4ae8557018
drtio: remame drtio_transceiver to gt_drtio
...
Co-authored-by: linuswck <linuswck@m-labs.hk>
Co-committed-by: linuswck <linuswck@m-labs.hk>
2023-08-28 13:05:40 +08:00
dc08c382a2
satman: wait longer for PLL lock ( #246 )
2023-08-13 13:52:12 +08:00
ca17cd419e
Revert "kasli_soc: add SFP0..3 LED indication"
...
This reverts commit 5111778363
2023-08-03 10:42:09 +08:00
5111778363
kasli_soc: add SFP0..3 LED indication
...
Co-authored-by: morgan <mc@m-labs.hk>
Co-committed-by: morgan <mc@m-labs.hk>
2023-07-24 16:30:14 +08:00
ee438105b2
json: base -> drtio_role
2023-06-16 17:03:25 +08:00
f1ee3a7584
rustfmt
2023-05-30 12:22:46 +08:00
63594d7e3d
update configuration of IBUFDS_GTE2
...
Input clock is terminated internally with 50 Ohm on each leg and to 4/5 MGTAVCC.
2023-05-30 12:08:41 +08:00
5e6dca61a9
analyzer: fix overflow behavior
2023-05-29 13:53:28 +08:00
b6247f409d
analyzer: fix warnings on standalone
2023-05-29 10:03:44 +08:00
6088e6bb6f
fix cargo fmt
2023-05-24 10:00:48 +08:00
ad076dd4e9
zc706: fix satellite analyzer target
2023-05-24 09:52:16 +08:00
a27b450def
runtime: port drtio-enabled analyzer
2023-05-22 15:23:40 +08:00
c536a70890
satellite gateware: add rtio analyzer
2023-05-22 15:23:24 +08:00
259b0ba1b7
satellite: port analyzer, drtio packets
2023-05-22 15:23:23 +08:00
cbc660e740
ddma: pass "uses_ddma" flag
2023-04-18 12:36:07 +08:00
8cb6cf6094
Fix mismatched signatures for the wide interface
...
Lists are passed by-reference from python code, and so should be
&CSlice<_> not CSlice<_>.
2023-04-17 09:24:30 +08:00
c6fcc4e351
Add ext0_synth0_80to125 option to the clocker config
...
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-04-13 12:08:25 +08:00
bf50a44f76
cargo fmt
2023-04-04 11:48:48 +08:00
64cadd90f5
fix imports
2023-04-04 11:23:11 +08:00
271a1adb04
firmware: improve RTIO map error reporting
2023-04-04 11:17:26 +08:00
b747abe83c
qc2: add 4 edge counters to the end of rtio
2023-04-03 12:25:07 +08:00
48721ca9cb
apply rustfmt policies to ddma code
2023-03-27 15:53:32 +08:00
90071f7620
Master: DDMA support
...
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2023-03-27 15:47:54 +08:00
908dfc780e
satman: add dma support
2023-03-23 11:04:26 +08:00
4b1ce1a6ff
satellites: add rtio_dma, connect as cri master
2023-03-21 15:54:58 +08:00
a519d24074
firmware: create and apply rustfmt policy
...
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
2023-02-22 11:02:43 +08:00
dce37a52aa
KasliSoC satellite: fix serdes timing
2023-02-20 13:07:42 +08:00
d72a2e7d07
fix previous commit
...
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
2023-02-17 17:49:36 +08:00
05c22792d6
satman: drive SFP TX_DISABLE
...
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
2023-02-17 17:19:30 +08:00
dcc5cc7555
satellite: add Error LED on panic
2023-02-17 16:21:52 +08:00
46b2687d70
RTIO/SYS Clock merge
...
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2023-02-17 15:52:43 +08:00
ca6e0d13ad
Remove virtual LEDs from io_expander
...
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-02-15 18:14:05 +08:00
b4b7912c40
Port tx_disable-related code from Kasli
...
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-02-15 17:44:01 +08:00
8230a01701
Build io_expander
...
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-02-15 15:31:22 +08:00
4bc936f071
Copy io expander from kasli
...
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-02-15 14:37:55 +08:00
David Nadlinger
df4988c774
rpc: Port over size/alignment fix for structs (tuples) with tail padding
...
This ports over the following commits from the main ARTIQ repo:
- 8740ec3dd52d85084237797881ea137492bfe070
- dbbe8e8ed4f852e623775b7bd3aec818cdd03376
- b9f13d48aa7e2c0652210152b971b21c3c419347
2023-01-28 16:15:28 +00:00
800c12e794
fix resolve_channel_name typing
2023-01-12 16:52:36 +08:00
d36899b485
firmware: unify RTIO error message format
...
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
2023-01-09 16:13:42 +08:00
6b3fa98d70
add channel names to RTIO errors
...
Co-authored-by: Egor Savkin <es@m-labs.hk>
Co-committed-by: Egor Savkin <es@m-labs.hk>
2023-01-09 12:35:56 +08:00
44ef13d1c0
Fix idle/startup_kernel typos in config
...
Signed-off-by: Egor Savkin <es@m-labs.hk>
2023-01-03 09:55:36 +08:00
David Nadlinger
8e0229d265
si5324: crystal_{ref -> as_ckin2} [nfc]
...
This makes it clear that by itself, the flag does not
cause the input mux to be changed.
2022-12-17 01:33:50 +00:00
David Nadlinger
2ddb4d259f
Undo most of Si5324 unification ( 5c054cc901)
...
This reverts most of 5c054cc901
2022-12-17 01:31:14 +00:00
David Nadlinger
5c054cc901
Unify Si5324 setup code with main ARTIQ repository [nfc]
...
I chose the version from the main repository for two
reasons:
- Explicitly specifying si5324_ref_input every time would
not work for the different Kasli/… hardware versions.
- Having `crystal_ref` as a setting in the configuration
is misleading if it does not actually activate the crystal
for use as a reference (but rather does
`route_crystal_to_ckin2`).
Related m-labs/artiq commits:
- 740543d4e284245248e3ff838c46505938dcae7a
- 3c7a394eff553ab75a7ea78bdd17830366504dc6
2022-12-12 23:22:01 +00:00
db0e41af6d
update zynq-rs and some Rust deps
2022-11-30 22:49:10 +08:00
c834e4f503
enable network and mgmt during Rust panic, make RTIO PLL lock failure a panic
...
Closes #198 #200
Making it a soft panic makes it more involved with a bit of code duplication - setting up mgmt requires setting up the interface and sockets. Maybe can be done a bit cleaner.
```
[spaqin@hera:~/m-labs/artiq-zynq]$ artiq_sinara_tester
****** Sinara system tester ******
[...]
ConnectionRefusedError: [Errno 111] Connection refused
[spaqin@hera:~/m-labs/artiq-zynq]$ artiq_coremgmt -D 192.168.1.56 log
[ 0.000067s] INFO(runtime): NAR3/Zynq7000 starting...
[ 0.005238s] INFO(runtime): detected gateware: GenericMaster
[ 0.016152s] INFO(libboard_zynq::i2c): PCA9548 detected
[ 0.023004s] WARN(runtime): config initialization failed: SD error: Card initialization error: No card inserted, check if the card is inserted properly.
[ 0.036730s] WARN(runtime::rtio_clocking): error reading configuration. Falling back to default.
[ 0.213000s] ERROR(runtime::rtio_clocking): RTIO PLL failed to lock
[ 0.224443s] INFO(libboard_zynq::i2c): PCA9548 detected
[ 0.256197s] INFO(runtime::comms): network addresses: MAC=e8-eb-1b-13-49-8b IPv4=192.168.1.56 IPv6-LL=fe80::eaeb:1bff:fe13:498b IPv6: no configured address
[ 0.270183s] ERROR(runtime::comms): There has been an error configuring the device: RTIO PLL failed to lock. Only mgmt interface will be available.
[ 4.000095s] INFO(libboard_zynq::eth): eth: got Link { speed: S1000, duplex: Full }
[ 33.148521s] INFO(runtime::mgmt): received connection
```
Reviewed-on: M-Labs/artiq-zynq#199
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2022-10-21 17:56:34 +08:00
dc862a9051
match ident message with mainline
2022-10-21 12:08:11 +08:00
19e60073de
kasli_soc: ident = variant name
2022-10-21 11:55:24 +08:00
a546d0f95b
Implement reboot for artiq_coremgmt
2022-10-07 18:31:11 +08:00
d6ae646790
update dependencies
2022-10-07 18:30:39 +08:00
f3310324d7
update dependencies
2022-08-26 17:37:27 +08:00
0812f22423
update dependencies
2022-07-20 17:34:26 +08:00
b638fce069
update SEEN_ASYNC_ERRORS in destination_survey ( #195 )
...
Co-authored-by: kk105 <kkl@m-kabs.hk>
Reviewed-on: M-Labs/artiq-zynq#195
Co-authored-by: kk105 <kkl@m-labs.hk>
Co-committed-by: kk105 <kkl@m-labs.hk>
2022-06-20 17:41:08 +08:00
9ec6a1feab
dyld/rebind: support rela generation with nac3ld
2022-06-01 21:27:38 +08:00
8e144e41de
reloc: impl ARM_PREL31 handling
2022-06-01 21:27:38 +08:00
512b6bac12
reloc: add PC-relative relocation support
2022-06-01 21:27:38 +08:00
e3ed41ff32
fix index table reference type
2022-06-01 18:35:50 +08:00
97a63ca8d0
dyld: add EXIDX entry type
...
The type is just for aesthetic. The interpretation of an index table entry is not our concern.
2022-06-01 18:33:19 +08:00
f0febe0ee4
change catch type to single reference
2022-05-31 18:26:30 +08:00
7a8f96dbd9
rtio_mgt: use mutex's async_lock
2022-05-25 10:39:06 +08:00
596edb480c
cargo: update zynq-rs
2022-05-25 10:37:38 +08:00
4f457d9c24
moninj: log link down at debug level
2022-05-25 10:37:38 +08:00
24df52268e
moninj: restructure timeout
...
stop logging errors if satellite is unavailable
drtio: don't even send message if link is down
2022-05-25 10:37:38 +08:00
48c9b43171
moninj: make it use async drtioaux
2022-05-25 10:37:38 +08:00
57d7f01b04
drtio: port 64-bit padding from mainline
2022-05-24 15:43:01 +08:00
efc432352e
zc706: no syncrtio for master, fixes hangs ( #188 )
2022-05-03 14:36:10 +08:00
def4d989cd
kasli_soc: fix si5324 pins routed to GTX
2022-04-25 12:33:21 +08:00
1d731a3589
zc706 master: route sma clock to si5324
2022-04-13 16:35:52 +08:00
3cf86a6335
satellites: add rtio_crg cfg
2022-04-12 13:44:53 +08:00
78bc162749
rtio_clocking: remove loop
2022-04-12 13:33:52 +08:00
14f7778732
update libconfig features
2022-04-08 10:30:21 +08:00
dcfb28ce61
fix drtioaux packet corruption
...
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2022-04-01 14:15:14 +08:00
433a9cdaf1
runtime: fix warnings on nondrtio systems
2022-03-29 10:05:11 +08:00
a79bef2243
runtime: provide/fix more libc mem functions
2022-03-28 13:24:01 +08:00
c6ef9b117c
fix previous commit
2022-03-26 20:08:11 +08:00
dcfaf587ec
firmware: add UnwrapNoneError exception
2022-03-26 15:29:40 +08:00
a92561b9d3
implement rtio_get_destination_status ( #177 )
...
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2022-03-25 18:20:05 +08:00
161044e78f
drop support for big-endian moninj
2022-03-19 23:01:36 +08:00
426500d2f9
firmware: support 64-bit moninj probes
2022-03-17 20:26:44 +08:00
ebdb08180d
drtio: demote default routing table message to info
2022-03-16 21:04:12 +08:00
0530e596ba
mgmt: remove spurious config write warning
2022-03-16 08:24:52 +08:00
7502f3a765
update dependencies
2022-03-10 17:25:40 +08:00
ae0d724bf8
runtime: use &CSlice for lists
2022-03-10 16:30:34 +08:00
6c834899e9
si5324: fix clock source
2022-03-09 13:55:36 +08:00
a22b13cc46
kasli_soc: forward SMA clkin
2022-03-09 12:43:47 +08:00
85e5c08d7f
kasli_soc: use si5324 in master
2022-03-04 13:17:53 +08:00
3c17362fad
satman: fix i2cswitch
2022-03-03 17:18:22 +08:00
4f2a0986da
rtio_clocking: fix wrong descriptions
2022-03-03 10:24:13 +08:00
4a2218641f
fix BorrowMutError in moninj
2022-03-02 15:45:17 +08:00
9a06cd9d27
expose pca954x_select api ( #167 )
...
PR accompanying to ARTIQ's PCA954X support (#1860 ).
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2022-03-02 10:52:27 +08:00
b56b50b147
add comment about EXCEPTION_ID_LOOKUP sync
2022-03-01 09:50:28 +08:00
f38117774f
runtime/eh_artiq: updated exception IDs
...
Fixes #166
2022-02-28 21:15:07 +08:00
880ba6b206
runtime: add nac3 exception symbols
2022-02-23 11:05:08 +08:00
accac99f48
updated zynq-rs with pca9547 support ( #165 )
...
Co-authored-by: mwojcik <mw@m-labs.hk>
Co-committed-by: mwojcik <mw@m-labs.hk>
2022-02-11 13:53:58 +08:00
6f5ba46e89
runtime/eh_artiq: support exception allocation
...
The backtrace is now nested, and should be used together with the stack
pointer array to construct the full backtrace for each exception.
We now allocate exception objects in a stack, but their names are still
not allocated. This is fine for exceptions raised in the driver or artiq
code, but we will have to implement allocation for names of exceptions
raised in RPC calls. The compiler should also emit code to store the
exception names once they catch it, to prepare for later reraising.
2022-01-23 21:31:22 +08:00
8923feceac
runtime/eh_artiq: use forced unwind
...
This patches ports the LLVM libunwind newly added forced unwinding
function. This enables us to run forced unwinding to obtain correct
backtrace when uncaught exceptions occur.
This patch also changes the exception handling scheme from the standard
two-phase unwinding to single phase using forced unwinding. This brings
some performance improvement and prepared for later nested exception
support. For nested exceptions, we will have to record the backtrace
regardless if the exception is an uncaught exception, as there can be
another exception being thrown while executing the finally block for
caught exceptions, and we will lose the backtrace if we don't store it
earlier before running the cleanup pads.
2022-01-14 13:35:24 +08:00
97ca72f7f1
libunwind: enable lto
2022-01-06 14:04:04 +08:00
acaf388dbb
eh_artiq: handle catch clauses appropriately
2022-01-06 13:41:47 +08:00
