forked from M-Labs/zynq-rs
63 lines
1.9 KiB
Rust
63 lines
1.9 KiB
Rust
use core::mem::uninitialized;
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use crate::{register, register_bit, register_bits, register_bits_typed, regs::*};
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/// Descriptor entry
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#[repr(C)]
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struct DescEntry {
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word0: DescWord0,
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word1: DescWord1,
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}
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register!(desc_word0, DescWord0, RW, u32);
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/// true if owned by software, false if owned by hardware
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register_bit!(desc_word0, used, 0);
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/// mark last desc in list
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register_bit!(desc_word0, wrap, 1);
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register_bits!(desc_word0, address, u32, 2, 31);
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register!(desc_word1, DescWord1, RW, u32);
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register_bits!(desc_word1, frame_length_lsbs, u16, 0, 12);
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register_bit!(desc_word1, bad_fcs, 13);
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register_bit!(desc_word1, start_of_frame, 14);
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register_bit!(desc_word1, end_of_frame, 15);
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register_bit!(desc_word1, cfi, 16);
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register_bits!(desc_word1, vlan_priority, u8, 17, 19);
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register_bit!(desc_word1, priority_tag, 20);
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register_bit!(desc_word1, vlan_tag, 21);
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register_bits!(desc_word1, bits_22_23, u8, 22, 23);
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register_bit!(desc_word1, bit_24, 24);
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register_bits!(desc_word1, spec_addr_which, u8, 25, 26);
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register_bit!(desc_word1, spec_addr_match, 27);
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register_bit!(desc_word1, uni_hash_match, 29);
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register_bit!(desc_word1, multi_hash_match, 30);
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register_bit!(desc_word1, global_broadcast, 31);
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/// Number of descriptors
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pub const DESCS: usize = 8;
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#[repr(C)]
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pub struct DescList<'a> {
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list: [DescEntry; DESCS],
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buffers: [&'a mut [u8]; DESCS],
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}
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impl<'a> DescList<'a> {
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pub fn new(buffers: [&'a mut [u8]; DESCS]) -> Self {
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let mut list: [DescEntry; DESCS] = unsafe { uninitialized() };
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for i in 0..DESCS {
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let buffer_addr = &mut buffers[i][0] as *mut _ as u32;
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list[i].word0.write(
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DescWord0::zeroed()
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.used(false)
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.wrap(i == DESCS - 1)
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.address(buffer_addr >> 2)
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);
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list[i].word1.write(
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DescWord1::zeroed()
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);
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}
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DescList { list, buffers }
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}
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}
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