forked from M-Labs/zynq-rs
90 lines
2.0 KiB
Rust
90 lines
2.0 KiB
Rust
use crate::regs::{RegisterR, RegisterW};
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macro_rules! def_reg_get {
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($name:tt, $type: ty, $asm_instr:tt) => {
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impl RegisterR for $name {
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type R = $type;
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#[inline(always)]
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fn read(&self) -> Self::R {
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let mut value;
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unsafe { asm!($asm_instr : "=r" (value) ::: "volatile") }
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value
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}
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}
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}
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}
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macro_rules! def_reg_set {
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($name:ty, $type:ty, $asm_instr:tt) => {
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impl RegisterW for $name {
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type W = $type;
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#[inline(always)]
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fn write(&mut self, value: Self::W) {
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unsafe { asm!($asm_instr :: "r" (value) :: "volatile") }
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}
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fn zeroed() -> Self::W {
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0
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}
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}
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}
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}
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/// Stack Pointer
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pub struct SP;
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def_reg_get!(SP, u32, "mov $0, sp");
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def_reg_set!(SP, u32, "mov sp, $0");
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/// Link register (function call return address)
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pub struct LR;
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def_reg_get!(LR, u32, "mov $0, lr");
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def_reg_set!(LR, u32, "mov lr, $0");
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pub struct MPIDR;
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def_reg_get!(MPIDR, u32, "mrc p15, 0, $0, c0, c0, 5");
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pub struct DFAR;
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def_reg_get!(DFAR, u32, "mrc p15, 0, $0, c6, c0, 0");
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pub struct DFSR;
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def_reg_get!(DFSR, u32, "mrc p15, 0, $0, c5, c0, 0");
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pub struct SCTLR;
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def_reg_get!(SCTLR, u32, "mrc p15, 0, $0, c1, c0, 0");
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def_reg_set!(SCTLR, u32, "mcr p15, 0, $0, c1, c0, 0");
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/// Invalidate TLBs
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#[inline(always)]
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pub fn tlbiall() {
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unsafe {
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asm!("mcr p15, 0, $0, c8, c7, 0" :: "r" (0) :: "volatile");
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}
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}
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/// Invalidate I-Cache
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#[inline(always)]
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pub fn iciallu() {
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unsafe {
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asm!("mcr p15, 0, $0, c7, c5, 0" :: "r" (0) :: "volatile");
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}
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}
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/// Invalidate Branch Predictor Array
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#[inline(always)]
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pub fn bpiall() {
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unsafe {
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asm!("mcr p15, 0, $0, c7, c5, 6" :: "r" (0) :: "volatile");
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}
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}
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/// Invalidate D-Cache
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#[inline(always)]
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pub fn dccisw() {
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// TODO: $0 is r11 at what value?
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unsafe {
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asm!("mcr p15, 0, $0, c7, c5, 6" :: "r" (0) :: "volatile");
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}
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}
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