zynq::ddr: don't overwrite slcr.ddr_pll_ctrl

master
Astro 2019-10-27 22:54:34 +01:00
parent 637bb35f43
commit f199ac68b4
1 changed files with 0 additions and 4 deletions

View File

@ -42,10 +42,6 @@ impl DdrRam {
let ddr2x_clk_divisor = 3 * ddr3x_clk_divisor / 2;
slcr::RegisterBlock::unlocked(|slcr| {
slcr.ddr_pll_ctrl.write(
slcr::PllCtrl::zeroed()
);
slcr.ddr_clk_ctrl.write(
slcr::DdrClkCtrl::zeroed()
.ddr_2xclkact(true)