add uart panic handler

smoltcp
Astro 2019-05-28 00:28:35 +02:00
parent 75bb755327
commit a645d13f4b
3 changed files with 10 additions and 9 deletions

7
Cargo.lock generated
View File

@ -5,11 +5,6 @@ name = "bit_field"
version = "0.10.0"
source = "registry+https://github.com/rust-lang/crates.io-index"
[[package]]
name = "panic-abort"
version = "0.3.1"
source = "registry+https://github.com/rust-lang/crates.io-index"
[[package]]
name = "r0"
version = "0.2.2"
@ -33,14 +28,12 @@ name = "zc706"
version = "0.0.0"
dependencies = [
"bit_field 0.10.0 (registry+https://github.com/rust-lang/crates.io-index)",
"panic-abort 0.3.1 (registry+https://github.com/rust-lang/crates.io-index)",
"r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)",
"volatile-register 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)",
]
[metadata]
"checksum bit_field 0.10.0 (registry+https://github.com/rust-lang/crates.io-index)" = "a165d606cf084741d4ac3a28fb6e9b1eb0bd31f6cd999098cfddb0b2ab381dc0"
"checksum panic-abort 0.3.1 (registry+https://github.com/rust-lang/crates.io-index)" = "2c14a66511ed17b6a8b4256b868d7fd207836d891db15eea5195dbcaf87e630f"
"checksum r0 0.2.2 (registry+https://github.com/rust-lang/crates.io-index)" = "e2a38df5b15c8d5c7e8654189744d8e396bddc18ad48041a500ce52d6948941f"
"checksum vcell 0.1.0 (registry+https://github.com/rust-lang/crates.io-index)" = "45c297f0afb6928cd08ab1ff9d95e99392595ea25ae1b5ecf822ff8764e57a0d"
"checksum volatile-register 0.2.0 (registry+https://github.com/rust-lang/crates.io-index)" = "0d67cb4616d99b940db1d6bd28844ff97108b498a6ca850e5b6191a532063286"

View File

@ -18,7 +18,6 @@ target_cora_z7_10 = []
default = ["target_zc706"]
[dependencies]
panic-abort = "0.3"
r0 = "0.2"
volatile-register = "0.2"
bit_field = "0.10"

View File

@ -5,7 +5,6 @@
use core::fmt::Write;
use panic_abort as _;
use r0::zero_bss;
mod regs;
@ -82,3 +81,13 @@ fn main() {
loop {
}
}
#[panic_handler]
fn panic(info: &core::panic::PanicInfo) -> ! {
let mut uart = Uart::serial(UART_RATE);
writeln!(uart, "\r\nPanic: {}\r", info);
while !uart.tx_fifo_empty() {}
slcr::RegisterBlock::unlocked(|slcr| slcr.soft_reset());
unreachable!()
}