sinara-hw/datasheets
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Author SHA1 Message Date
occheung
022563a056 5432: uncite IC for output voltage spec 
There are other elements on the output signal chain, like the unity op-amp folowing the DAC.
 2022-01-18 16:03:42 +08:00
occheung
b08b9dc069 5432: stress 32-CH DAC on diagram 2022-01-18 16:03:07 +08:00
occheung
00fd2df2e8 features: x-channel DDS/DAC 2022-01-18 16:02:01 +08:00
2 changed files with 4 additions and 4 deletions
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4410-4412.tex
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@ -35,7 +35,7 @@
\section{Features}
\begin{itemize}
\item{4 channels 1GS/s DDS.}
\item{4-channel 1GS/s DDS.}
\item{Output frequency ranges from \textless 1 to \textgreater 400 MHz.}
\item{Sub-Hz frequency resolution.}
\item{Controlled phase steps.}

6
5432.tex
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@ -34,7 +34,7 @@
\section{Features}
\begin{itemize}
\item{32-channels DAC.}
\item{32-channel DAC.}
\item{16-bits resolution.}
\item{1 MSPS shared between all channels.}
\item{Output voltage $\pm$10V.}
@ -84,7 +84,7 @@ Channels can broken out to BNC, SMA or MCX by adding external 5518 BNC-IDC, 5528
\draw (3, 0) node[buffer, circuitikz/bipoles/twoport/width=1.2, scale=-0.5] (amp) {};
% DAC AD5372
\draw (4.6, 0.2) node[twoportshape, t={DAC}, circuitikz/bipoles/twoport/width=1.2, circuitikz/bipoles/twoport/height=1.2, scale=0.7] (dac) {};
\draw (4.6, 0.2) node[twoportshape, t=\MyLabel{32-CH}{DAC}, circuitikz/bipoles/twoport/width=1.2, circuitikz/bipoles/twoport/height=1.2, scale=0.7] (dac) {};
% LVDS Transceivers
\draw (6.6, 0) node[twoportshape, t=\MymyLabel{LVDS}{Transceiever}, circuitikz/bipoles/twoport/width=1.8, scale=0.5, rotate=-90] (lvds0) {};
@ -167,7 +167,7 @@ and various information from Sinara wiki\footnote{\label{zotino_wiki}https://git
\textbf{Parameter} & \textbf{Symbol} & \textbf{Min.} & \textbf{Typ.} & \textbf{Max.} &
\textbf{Unit} & \textbf{Conditions} \\
\hline
Output voltage\repeatfootnote{dac} & $V_{out}$ & -10 & & 10 & V & \\
Output voltage & $V_{out}$ & -10 & & 10 & V & \\
\hline
Output impedance\repeatfootnote{zotino_wiki} & $Z_{out}$ & \multicolumn{4}{c|}{470 $\Omega$ $||$ 2.2nF} & \\
\hline