85 lines
2.6 KiB
Python
85 lines
2.6 KiB
Python
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from artiq.experiment import *
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class SineWave(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.shuttler0_leds = (
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[ self.get_device("shuttler0_led{}".format(i)) for i in range(2) ]
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)
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self.setattr_device("shuttler0_config")
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self.setattr_device("shuttler0_trigger")
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self.shuttler0_dcbias = (
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[ self.get_device("shuttler0_dcbias{}".format(i)) for i in range(16) ]
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)
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self.shuttler0_dds = (
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[ self.get_device("shuttler0_dds{}".format(i)) for i in range(16) ]
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)
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self.setattr_device("shuttler0_relay")
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self.setattr_device("shuttler0_adc")
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@kernel
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def relay_init(self):
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self.shuttler0_relay.init()
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self.shuttler0_relay.enable(0x0000)
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@kernel
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def adc_init(self):
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delay_mu(int64(self.core.ref_multiplier))
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self.shuttler0_adc.power_up()
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delay_mu(int64(self.core.ref_multiplier))
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assert self.shuttler0_adc.read_id() >> 4 == 0x038d
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delay_mu(int64(self.core.ref_multiplier))
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# The actual output voltage is limited by the hardware,
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# the calculated calibration gain and offset.
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# For example, if the system has a calibration gain of
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# 1.06, then the max output voltage = 10 / 1.06 = 9.43V.
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# Setting a value larger than 9.43V will result in overflow.
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self.shuttler0_adc.calibrate(
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self.shuttler0_dcbias, self.shuttler0_trigger, self.shuttler0_config)
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@kernel
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def shuttler_channel_reset(self, ch):
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self.shuttler0_dcbias[ch].set_waveform(
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a0=0, a1=0, a2=0, a3=0,
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)
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self.shuttler0_dds[ch].set_waveform(
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b0=0, b1=0, b2=0, b3=0,
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c0=0, c1=0, c2=0,
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)
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self.shuttler0_trigger.trigger(1 << ch)
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@kernel
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def run(self):
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self.core.reset()
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self.core.break_realtime()
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self.relay_init()
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self.adc_init()
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for i in range(16):
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self.shuttler_channel_reset(i)
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# To avoid RTIO Underflow
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delay(50*us)
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@kernel
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def sine(self):
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for i in range(2):
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self.shuttler0_dcbias[i].set_waveform(
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a0=0,
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a1=0,
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a2=0,
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a3=0,
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)
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self.shuttler0_dds[i].set_waveform(
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b0=0x0FFF,
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b1=0,
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b2=0,
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b3=0,
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c0=0,
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c1=0x147AE148, # Frequency = 10MHz
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c2=0,
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)
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self.shuttler0_trigger.trigger(0xFFFF)
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