sinara-hw
/
assembly
5
3
Fork 3
Code Issues Pull Requests Packages Projects Releases Activity

Fix formatting 

Signed-off-by: Egor Savkin <es@m-labs.hk>
pull/7/head
Egor Savkin 2023-11-15 15:09:47 +08:00
parent 8261c1c4e6
commit 48b85eac93
1 changed files with 6 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/sw_sup/clocking.md
View File

@ -3,8 +3,7 @@
This page describes ways to set up clocking. Official documentation references: This page describes ways to set up clocking. Official documentation references:
* [Carrier configuration](https://m-labs.hk/artiq/manual/installing.html#miscellaneous-configuration-of-the-core-device) * [Carrier configuration](https://m-labs.hk/artiq/manual/installing.html#miscellaneous-configuration-of-the-core-device)
* * Devices' [available options](https://m-labs.hk/artiq/manual/core_drivers_reference.html), [Urukul example](https://m-labs.hk/artiq/manual/core_drivers_reference.html#artiq.coredevice.urukul.CPLD)
Devices' [available options](https://m-labs.hk/artiq/manual/core_drivers_reference.html), [Urukul example](https://m-labs.hk/artiq/manual/core_drivers_reference.html#artiq.coredevice.urukul.CPLD)
In general, any RF card and Carriers require some clock source. Most of them have both internal clock signal generator In general, any RF card and Carriers require some clock source. Most of them have both internal clock signal generator
and external MMCX and/or SMA connectors to accept the signal. By default the internal clock is used for Carriers, and external MMCX and/or SMA connectors to accept the signal. By default the internal clock is used for Carriers,
@ -60,7 +59,11 @@ so Urukul entry may look like this:
```json ```json
{ {
"type": "urukul", "dds": "ad9910", "ports": [1, 2], "refclk": 10e6, "clk_sel": 1 "type": "urukul",
"dds": "ad9910",
"ports": [1, 2],
"refclk": 10e6,
"clk_sel": 1
} }
``` ```