Syrostan/FPGA.sch

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EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
2021-06-17 10:52:33 +08:00
Sheet 3 6
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L ICE40HX8K-CT256:ICE40HX8K-CT256 U2
U 1 1 60C3208F
2021-06-16 17:13:34 +08:00
P 1100 3500
F 0 "U2" H 1207 6480 50 0000 C CNN
F 1 "ICE40HX8K-CT256" H 1207 6389 50 0000 C CNN
F 2 "iCE40HX8K:BGA256C80P16X16_1400X1400X170" H 1100 3500 50 0001 L BNN
F 3 "" H 1100 3500 50 0001 L BNN
F 4 "3.4" H 1100 3500 50 0001 L BNN "PART_REV"
F 5 "IPC-7351B" H 1100 3500 50 0001 L BNN "STANDARD"
F 6 "Lattice Semiconductor" H 1100 3500 50 0001 L BNN "MANUFACTURER"
1 1100 3500
1 0 0 -1
$EndComp
$Comp
L ICE40HX8K-CT256:ICE40HX8K-CT256 U2
U 2 1 60C3E3C6
2021-06-16 17:13:34 +08:00
P 3050 3500
F 0 "U2" H 3157 6480 50 0000 C CNN
F 1 "ICE40HX8K-CT256" H 3157 6389 50 0000 C CNN
F 2 "iCE40HX8K:BGA256C80P16X16_1400X1400X170" H 3050 3500 50 0001 L BNN
F 3 "" H 3050 3500 50 0001 L BNN
F 4 "3.4" H 3050 3500 50 0001 L BNN "PART_REV"
F 5 "IPC-7351B" H 3050 3500 50 0001 L BNN "STANDARD"
F 6 "Lattice Semiconductor" H 3050 3500 50 0001 L BNN "MANUFACTURER"
2 3050 3500
1 0 0 -1
$EndComp
$Comp
L ICE40HX8K-CT256:ICE40HX8K-CT256 U2
U 3 1 60C54333
2021-06-16 17:13:34 +08:00
P 5050 3500
F 0 "U2" H 5157 6480 50 0000 C CNN
F 1 "ICE40HX8K-CT256" H 5157 6389 50 0000 C CNN
F 2 "iCE40HX8K:BGA256C80P16X16_1400X1400X170" H 5050 3500 50 0001 L BNN
F 3 "" H 5050 3500 50 0001 L BNN
F 4 "3.4" H 5050 3500 50 0001 L BNN "PART_REV"
F 5 "IPC-7351B" H 5050 3500 50 0001 L BNN "STANDARD"
F 6 "Lattice Semiconductor" H 5050 3500 50 0001 L BNN "MANUFACTURER"
3 5050 3500
1 0 0 -1
$EndComp
$Comp
L ICE40HX8K-CT256:ICE40HX8K-CT256 U2
U 4 1 60CA2FCB
2021-06-16 17:13:34 +08:00
P 7150 3500
F 0 "U2" H 7257 6480 50 0000 C CNN
F 1 "ICE40HX8K-CT256" H 7257 6389 50 0000 C CNN
F 2 "iCE40HX8K:BGA256C80P16X16_1400X1400X170" H 7150 3500 50 0001 L BNN
F 3 "" H 7150 3500 50 0001 L BNN
F 4 "3.4" H 7150 3500 50 0001 L BNN "PART_REV"
F 5 "IPC-7351B" H 7150 3500 50 0001 L BNN "STANDARD"
F 6 "Lattice Semiconductor" H 7150 3500 50 0001 L BNN "MANUFACTURER"
4 7150 3500
1 0 0 -1
$EndComp
$Comp
L ICE40HX8K-CT256:ICE40HX8K-CT256 U2
U 5 1 60CA8576
2021-06-16 17:13:34 +08:00
P 9750 3550
F 0 "U2" H 9857 6530 50 0000 C CNN
F 1 "ICE40HX8K-CT256" H 9857 6439 50 0000 C CNN
F 2 "iCE40HX8K:BGA256C80P16X16_1400X1400X170" H 9750 3550 50 0001 L BNN
F 3 "" H 9750 3550 50 0001 L BNN
F 4 "3.4" H 9750 3550 50 0001 L BNN "PART_REV"
F 5 "IPC-7351B" H 9750 3550 50 0001 L BNN "STANDARD"
F 6 "Lattice Semiconductor" H 9750 3550 50 0001 L BNN "MANUFACTURER"
5 9750 3550
1 0 0 -1
$EndComp
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 900 10550 900
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 900 10550 1000
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 1400 10450 1400
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 1300 10550 1300
Connection ~ 10550 1300
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 1300 10550 1400
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 1200 10550 1200
Connection ~ 10550 1200
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 1200 10550 1300
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 1100 10550 1100
Connection ~ 10550 1100
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 1100 10550 1200
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 1000 10550 1000
Connection ~ 10550 1000
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 1000 10550 1100
Connection ~ 10550 900
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 4100 10550 4100
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4100 10550 4200
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 5800 10450 5800
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 5700 10550 5700
Connection ~ 10550 5700
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 5700 10550 5800
Connection ~ 10550 5600
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 5600 10550 5700
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 5500 10550 5500
Connection ~ 10550 5500
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 5500 10550 5600
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 5600 10550 5600
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 5400 10550 5400
Connection ~ 10550 5400
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 5400 10550 5500
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 5300 10550 5300
Connection ~ 10550 5300
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 5300 10550 5400
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 5200 10550 5200
Connection ~ 10550 5200
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 5200 10550 5300
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 5100 10550 5100
Connection ~ 10550 5100
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 5100 10550 5200
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 5000 10550 5000
Connection ~ 10550 5000
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 5000 10550 5100
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 4900 10550 4900
Connection ~ 10550 4900
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4900 10550 5000
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 4800 10550 4800
Connection ~ 10550 4800
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4800 10550 4900
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 4700 10550 4700
Connection ~ 10550 4700
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4700 10550 4800
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 4600 10550 4600
Connection ~ 10550 4600
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4600 10550 4700
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 4500 10550 4500
Connection ~ 10550 4500
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4500 10550 4600
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 4400 10550 4400
Connection ~ 10550 4400
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4400 10550 4500
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 4300 10550 4300
Connection ~ 10550 4300
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4300 10550 4400
Wire Wire Line
2021-06-16 17:13:34 +08:00
10450 4200 10550 4200
Connection ~ 10550 4200
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4200 10550 4300
Connection ~ 10550 4100
2021-06-16 15:23:18 +08:00
$Comp
2021-06-16 17:13:34 +08:00
L power:GND #PWR0109
2021-06-16 15:23:18 +08:00
U 1 1 61087D3E
2021-06-16 17:13:34 +08:00
P 10850 4100
F 0 "#PWR0109" H 10850 3850 50 0001 C CNN
F 1 "GND" V 10855 3972 50 0000 R CNN
F 2 "" H 10850 4100 50 0001 C CNN
F 3 "" H 10850 4100 50 0001 C CNN
1 10850 4100
2021-06-16 15:23:18 +08:00
0 -1 -1 0
$EndComp
$Comp
2021-06-16 17:13:34 +08:00
L power:+1V2 #PWR0110
2021-06-16 15:23:18 +08:00
U 1 1 61088FD2
2021-06-16 17:13:34 +08:00
P 10850 900
F 0 "#PWR0110" H 10850 750 50 0001 C CNN
F 1 "+1V2" V 10865 1028 50 0000 L CNN
F 2 "" H 10850 900 50 0001 C CNN
F 3 "" H 10850 900 50 0001 C CNN
1 10850 900
2021-06-16 15:23:18 +08:00
0 1 1 0
$EndComp
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 900 10850 900
2021-06-16 15:23:18 +08:00
Wire Wire Line
2021-06-16 17:13:34 +08:00
10550 4100 10850 4100
Wire Wire Line
10450 3150 10550 3150
Wire Wire Line
10550 3150 10550 3250
Wire Wire Line
10550 3450 10450 3450
Wire Wire Line
10450 3250 10550 3250
Connection ~ 10550 3250
Wire Wire Line
10550 3250 10550 3350
Wire Wire Line
10450 3350 10550 3350
Connection ~ 10550 3350
Wire Wire Line
10550 3350 10550 3450
Wire Wire Line
10450 2700 10550 2700
Wire Wire Line
10550 2700 10550 2800
Wire Wire Line
10550 3000 10450 3000
Wire Wire Line
10450 2900 10550 2900
Connection ~ 10550 2900
Wire Wire Line
10550 2900 10550 3000
Wire Wire Line
10450 2800 10550 2800
Connection ~ 10550 2800
Wire Wire Line
10550 2800 10550 2900
Wire Wire Line
10450 2350 10550 2350
Wire Wire Line
10550 2350 10550 2450
Wire Wire Line
10550 2550 10450 2550
Wire Wire Line
10450 2450 10550 2450
Connection ~ 10550 2450
Wire Wire Line
10550 2450 10550 2550
Wire Wire Line
10450 1900 10550 1900
Wire Wire Line
10550 1900 10550 2000
Wire Wire Line
10550 2200 10450 2200
Wire Wire Line
10450 2100 10550 2100
Connection ~ 10550 2100
Wire Wire Line
10550 2100 10550 2200
Wire Wire Line
10450 2000 10550 2000
Connection ~ 10550 2000
Wire Wire Line
10550 2000 10550 2100
$Comp
L power:+3V3 #PWR062
U 1 1 610FFF53
P 10850 1900
F 0 "#PWR062" H 10850 1750 50 0001 C CNN
F 1 "+3V3" V 10865 2028 50 0000 L CNN
F 2 "" H 10850 1900 50 0001 C CNN
F 3 "" H 10850 1900 50 0001 C CNN
1 10850 1900
0 1 1 0
$EndComp
Text HLabel 10850 1700 2 50 Input ~ 0
FPGA_VPP_FAST
$Comp
L power:+2V5 #PWR061
U 1 1 6110673B
P 10850 1600
F 0 "#PWR061" H 10850 1450 50 0001 C CNN
F 1 "+2V5" V 10865 1728 50 0000 L CNN
F 2 "" H 10850 1600 50 0001 C CNN
F 3 "" H 10850 1600 50 0001 C CNN
1 10850 1600
0 1 1 0
$EndComp
$Comp
L power:+3V3 #PWR063
U 1 1 6110AE73
P 10850 2350
F 0 "#PWR063" H 10850 2200 50 0001 C CNN
F 1 "+3V3" V 10865 2478 50 0000 L CNN
F 2 "" H 10850 2350 50 0001 C CNN
F 3 "" H 10850 2350 50 0001 C CNN
1 10850 2350
0 1 1 0
$EndComp
$Comp
L power:+3V3 #PWR064
U 1 1 6110BA58
P 10850 2700
F 0 "#PWR064" H 10850 2550 50 0001 C CNN
F 1 "+3V3" V 10865 2828 50 0000 L CNN
F 2 "" H 10850 2700 50 0001 C CNN
F 3 "" H 10850 2700 50 0001 C CNN
1 10850 2700
0 1 1 0
$EndComp
$Comp
L power:+2V5 #PWR065
U 1 1 61110124
P 10850 3150
F 0 "#PWR065" H 10850 3000 50 0001 C CNN
F 1 "+2V5" V 10865 3278 50 0000 L CNN
F 2 "" H 10850 3150 50 0001 C CNN
F 3 "" H 10850 3150 50 0001 C CNN
1 10850 3150
0 1 1 0
$EndComp
$Comp
L power:+3V3 #PWR066
U 1 1 611127A5
P 10850 3650
F 0 "#PWR066" H 10850 3500 50 0001 C CNN
F 1 "+3V3" V 10865 3778 50 0000 L CNN
F 2 "" H 10850 3650 50 0001 C CNN
F 3 "" H 10850 3650 50 0001 C CNN
1 10850 3650
0 1 1 0
$EndComp
Wire Wire Line
10450 3650 10850 3650
Wire Wire Line
10550 3150 10850 3150
Connection ~ 10550 3150
Wire Wire Line
10550 2700 10850 2700
Connection ~ 10550 2700
Wire Wire Line
10550 2350 10850 2350
Connection ~ 10550 2350
Wire Wire Line
10550 1900 10850 1900
Connection ~ 10550 1900
Wire Wire Line
10450 1600 10850 1600
Wire Wire Line
10450 1700 10850 1700
$Comp
L Device:C C42
U 1 1 61137BFE
P 4150 7350
F 0 "C42" H 4265 7396 50 0000 L CNN
F 1 "100nF" H 4265 7305 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 4188 7200 50 0001 C CNN
F 3 "~" H 4150 7350 50 0001 C CNN
1 4150 7350
1 0 0 -1
$EndComp
$Comp
L Device:C C43
U 1 1 61141436
P 4500 7350
F 0 "C43" H 4615 7396 50 0000 L CNN
F 1 "10uF" H 4615 7305 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 4538 7200 50 0001 C CNN
F 3 "~" H 4500 7350 50 0001 C CNN
1 4500 7350
1 0 0 -1
$EndComp
$Comp
L Device:R R37
U 1 1 61146472
P 4150 6900
F 0 "R37" V 3943 6900 50 0000 C CNN
F 1 "100" V 4034 6900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 4080 6900 50 0001 C CNN
F 3 "~" H 4150 6900 50 0001 C CNN
1 4150 6900
-1 0 0 1
$EndComp
$Comp
L Device:C C44
U 1 1 6117399C
P 4900 7350
F 0 "C44" H 5015 7396 50 0000 L CNN
F 1 "100nF" H 5015 7305 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 4938 7200 50 0001 C CNN
F 3 "~" H 4900 7350 50 0001 C CNN
1 4900 7350
1 0 0 -1
$EndComp
$Comp
L Device:C C45
U 1 1 611739A2
P 5250 7350
F 0 "C45" H 5365 7396 50 0000 L CNN
F 1 "10uF" H 5365 7305 50 0000 L CNN
F 2 "Capacitor_SMD:C_0603_1608Metric" H 5288 7200 50 0001 C CNN
F 3 "~" H 5250 7350 50 0001 C CNN
1 5250 7350
1 0 0 -1
$EndComp
$Comp
L Device:R R38
U 1 1 611739A8
P 4900 6900
F 0 "R38" V 4693 6900 50 0000 C CNN
F 1 "100" V 4784 6900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 4830 6900 50 0001 C CNN
F 3 "~" H 4900 6900 50 0001 C CNN
1 4900 6900
-1 0 0 1
$EndComp
Wire Wire Line
5250 7100 5250 7200
Wire Wire Line
4900 7100 5250 7100
Wire Wire Line
4900 7500 4900 7600
Wire Wire Line
4900 7600 5250 7600
Wire Wire Line
5250 7600 5250 7500
Wire Wire Line
4500 7500 4500 7600
Wire Wire Line
4500 7600 4150 7600
Wire Wire Line
4150 7600 4150 7500
Wire Wire Line
4150 7100 4500 7100
Wire Wire Line
4500 7100 4500 7200
Wire Wire Line
4150 7100 4150 7200
$Comp
L power:+1V2 #PWR059
U 1 1 61193177
P 4150 6650
F 0 "#PWR059" H 4150 6500 50 0001 C CNN
F 1 "+1V2" V 4165 6778 50 0000 L CNN
F 2 "" H 4150 6650 50 0001 C CNN
F 3 "" H 4150 6650 50 0001 C CNN
1 4150 6650
1 0 0 -1
$EndComp
$Comp
L power:+1V2 #PWR060
U 1 1 61194D75
P 4900 6650
F 0 "#PWR060" H 4900 6500 50 0001 C CNN
F 1 "+1V2" V 4915 6778 50 0000 L CNN
F 2 "" H 4900 6650 50 0001 C CNN
F 3 "" H 4900 6650 50 0001 C CNN
1 4900 6650
1 0 0 -1
$EndComp
Wire Wire Line
4900 6750 4900 6650
Wire Wire Line
4150 6750 4150 6650
Text Label 4550 7100 0 50 ~ 0
VCCPLL0
Text Label 5300 7100 0 50 ~ 0
VCCPLL1
Text Label 4550 7600 0 50 ~ 0
GNDPLL0
Text Label 5300 7600 0 50 ~ 0
GNDPLL1
Wire Wire Line
4550 7100 4500 7100
Connection ~ 4500 7100
Wire Wire Line
4550 7600 4500 7600
Connection ~ 4500 7600
Wire Wire Line
5300 7100 5250 7100
Connection ~ 5250 7100
Wire Wire Line
5300 7600 5250 7600
Connection ~ 5250 7600
Text Label 10550 3800 0 50 ~ 0
VCCPLL0
Text Label 10550 6000 0 50 ~ 0
GNDPLL0
Text Label 10550 3900 0 50 ~ 0
VCCPLL1
Text Label 10550 6100 0 50 ~ 0
GNDPLL1
Wire Wire Line
10450 3800 10550 3800
Wire Wire Line
10450 3900 10550 3900
Wire Wire Line
10450 6000 10550 6000
Wire Wire Line
10450 6100 10550 6100
Wire Wire Line
7850 3600 7900 3600
Wire Wire Line
7850 3500 7900 3500
Text HLabel 8250 3600 2 50 Input ~ 0
FPGA_EEM0_0_P
Wire Wire Line
8200 3600 9050 3600
Wire Wire Line
8200 3500 8700 3500
Text HLabel 8250 3500 2 50 Input ~ 0
FPGA_EEM0_0_N
Wire Wire Line
9050 3500 9000 3500
Wire Wire Line
9050 3600 9050 3500
$Comp
L Device:R R98
U 1 1 614E81DA
P 8850 3500
F 0 "R98" V 8643 3500 50 0000 C CNN
F 1 "100/1%" V 8734 3500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 3500 50 0001 C CNN
F 3 "~" H 8850 3500 50 0001 C CNN
1 8850 3500
0 1 1 0
$EndComp
$Comp
L Device:R R62
U 1 1 614E81D4
P 8050 3600
F 0 "R62" V 7843 3600 50 0000 C CNN
F 1 "140/1%" V 7934 3600 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3600 50 0001 C CNN
F 3 "~" H 8050 3600 50 0001 C CNN
1 8050 3600
0 1 1 0
$EndComp
$Comp
L Device:R R61
U 1 1 614E81CE
P 8050 3500
F 0 "R61" V 7843 3500 50 0000 C CNN
F 1 "140/1%" V 7934 3500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3500 50 0001 C CNN
F 3 "~" H 8050 3500 50 0001 C CNN
1 8050 3500
0 1 1 0
$EndComp
Wire Wire Line
7850 2400 7900 2400
Wire Wire Line
7850 2300 7900 2300
Wire Wire Line
7850 2200 7900 2200
Wire Wire Line
7850 2100 7900 2100
Text HLabel 8250 2400 2 50 Input ~ 0
FPGA_EEM0_7_P
Wire Wire Line
8200 2400 9050 2400
Wire Wire Line
8200 2300 8700 2300
Text HLabel 8250 2300 2 50 Input ~ 0
FPGA_EEM0_7_N
Wire Wire Line
9050 2300 9000 2300
Wire Wire Line
9050 2400 9050 2300
$Comp
L Device:R R93
U 1 1 614E81BE
P 8850 2300
F 0 "R93" V 8643 2300 50 0000 C CNN
F 1 "100/1%" V 8734 2300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 2300 50 0001 C CNN
F 3 "~" H 8850 2300 50 0001 C CNN
1 8850 2300
0 1 1 0
$EndComp
$Comp
L Device:R R52
U 1 1 614E81B8
P 8050 2400
F 0 "R52" V 7843 2400 50 0000 C CNN
F 1 "140/1%" V 7934 2400 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 2400 50 0001 C CNN
F 3 "~" H 8050 2400 50 0001 C CNN
1 8050 2400
0 1 1 0
$EndComp
$Comp
L Device:R R51
U 1 1 614E81B2
P 8050 2300
F 0 "R51" V 7843 2300 50 0000 C CNN
F 1 "140/1%" V 7934 2300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 2300 50 0001 C CNN
F 3 "~" H 8050 2300 50 0001 C CNN
1 8050 2300
0 1 1 0
$EndComp
Text HLabel 8250 2200 2 50 Input ~ 0
FPGA_EEM0_6_P
Wire Wire Line
8200 2200 9050 2200
Wire Wire Line
8200 2100 8700 2100
Text HLabel 8250 2100 2 50 Input ~ 0
FPGA_EEM0_6_N
Wire Wire Line
9050 2100 9000 2100
Wire Wire Line
9050 2200 9050 2100
$Comp
L Device:R R92
U 1 1 614E81A6
P 8850 2100
F 0 "R92" V 8643 2100 50 0000 C CNN
F 1 "100/1%" V 8734 2100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 2100 50 0001 C CNN
F 3 "~" H 8850 2100 50 0001 C CNN
1 8850 2100
0 1 1 0
$EndComp
$Comp
L Device:R R50
U 1 1 614E81A0
P 8050 2200
F 0 "R50" V 7843 2200 50 0000 C CNN
F 1 "140/1%" V 7934 2200 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 2200 50 0001 C CNN
F 3 "~" H 8050 2200 50 0001 C CNN
1 8050 2200
0 1 1 0
$EndComp
$Comp
L Device:R R49
U 1 1 614E819A
P 8050 2100
F 0 "R49" V 7843 2100 50 0000 C CNN
F 1 "140/1%" V 7934 2100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 2100 50 0001 C CNN
F 3 "~" H 8050 2100 50 0001 C CNN
1 8050 2100
0 1 1 0
$EndComp
Text HLabel 8250 2000 2 50 Input ~ 0
FPGA_EEM0_5_P
Wire Wire Line
8200 2000 9050 2000
Wire Wire Line
8200 1900 8700 1900
Text HLabel 8250 1900 2 50 Input ~ 0
FPGA_EEM0_5_N
Wire Wire Line
9050 1900 9000 1900
Wire Wire Line
9050 2000 9050 1900
Wire Wire Line
7850 2000 7900 2000
Wire Wire Line
7850 1900 7900 1900
$Comp
L Device:R R91
U 1 1 614E818C
P 8850 1900
F 0 "R91" V 8643 1900 50 0000 C CNN
F 1 "100/1%" V 8734 1900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 1900 50 0001 C CNN
F 3 "~" H 8850 1900 50 0001 C CNN
1 8850 1900
0 1 1 0
$EndComp
$Comp
L Device:R R48
U 1 1 614E8186
P 8050 2000
F 0 "R48" V 7843 2000 50 0000 C CNN
F 1 "140/1%" V 7934 2000 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 2000 50 0001 C CNN
F 3 "~" H 8050 2000 50 0001 C CNN
1 8050 2000
0 1 1 0
$EndComp
$Comp
L Device:R R47
U 1 1 614E8180
P 8050 1900
F 0 "R47" V 7843 1900 50 0000 C CNN
F 1 "140/1%" V 7934 1900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 1900 50 0001 C CNN
F 3 "~" H 8050 1900 50 0001 C CNN
1 8050 1900
0 1 1 0
$EndComp
Wire Wire Line
7850 1800 7900 1800
Wire Wire Line
7850 1700 7900 1700
Text HLabel 8250 1800 2 50 Input ~ 0
FPGA_EEM0_4_P
Wire Wire Line
8200 1800 9050 1800
Wire Wire Line
8200 1700 8700 1700
Text HLabel 8250 1700 2 50 Input ~ 0
FPGA_EEM0_4_N
Wire Wire Line
9050 1700 9000 1700
Wire Wire Line
9050 1800 9050 1700
$Comp
L Device:R R90
U 1 1 614C2790
P 8850 1700
F 0 "R90" V 8643 1700 50 0000 C CNN
F 1 "100/1%" V 8734 1700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 1700 50 0001 C CNN
F 3 "~" H 8850 1700 50 0001 C CNN
1 8850 1700
0 1 1 0
$EndComp
$Comp
L Device:R R46
U 1 1 614C278A
P 8050 1800
F 0 "R46" V 7843 1800 50 0000 C CNN
F 1 "140/1%" V 7934 1800 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 1800 50 0001 C CNN
F 3 "~" H 8050 1800 50 0001 C CNN
1 8050 1800
0 1 1 0
$EndComp
$Comp
L Device:R R45
U 1 1 614C2784
P 8050 1700
F 0 "R45" V 7843 1700 50 0000 C CNN
F 1 "140/1%" V 7934 1700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 1700 50 0001 C CNN
F 3 "~" H 8050 1700 50 0001 C CNN
1 8050 1700
0 1 1 0
$EndComp
Wire Wire Line
7850 1600 7900 1600
Wire Wire Line
7850 1500 7900 1500
Wire Wire Line
7850 1400 7900 1400
Wire Wire Line
7850 1300 7900 1300
Text HLabel 8250 1600 2 50 Input ~ 0
FPGA_EEM0_3_P
Wire Wire Line
8200 1600 9050 1600
Wire Wire Line
8200 1500 8700 1500
Text HLabel 8250 1500 2 50 Input ~ 0
FPGA_EEM0_3_N
Wire Wire Line
9050 1500 9000 1500
Wire Wire Line
9050 1600 9050 1500
$Comp
L Device:R R89
U 1 1 6145E7AF
P 8850 1500
F 0 "R89" V 8643 1500 50 0000 C CNN
F 1 "100/1%" V 8734 1500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 1500 50 0001 C CNN
F 3 "~" H 8850 1500 50 0001 C CNN
1 8850 1500
0 1 1 0
$EndComp
$Comp
L Device:R R44
U 1 1 6145E7A9
P 8050 1600
F 0 "R44" V 7843 1600 50 0000 C CNN
F 1 "140/1%" V 7934 1600 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 1600 50 0001 C CNN
F 3 "~" H 8050 1600 50 0001 C CNN
1 8050 1600
0 1 1 0
$EndComp
$Comp
L Device:R R43
U 1 1 6145E7A3
P 8050 1500
F 0 "R43" V 7843 1500 50 0000 C CNN
F 1 "140/1%" V 7934 1500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 1500 50 0001 C CNN
F 3 "~" H 8050 1500 50 0001 C CNN
1 8050 1500
0 1 1 0
$EndComp
Text HLabel 8250 1400 2 50 Input ~ 0
FPGA_EEM0_2_P
Wire Wire Line
8200 1400 9050 1400
Wire Wire Line
8200 1300 8700 1300
Text HLabel 8250 1300 2 50 Input ~ 0
FPGA_EEM0_2_N
Wire Wire Line
9050 1300 9000 1300
Wire Wire Line
9050 1400 9050 1300
$Comp
L Device:R R88
U 1 1 614580E8
P 8850 1300
F 0 "R88" V 8643 1300 50 0000 C CNN
F 1 "100/1%" V 8734 1300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 1300 50 0001 C CNN
F 3 "~" H 8850 1300 50 0001 C CNN
1 8850 1300
0 1 1 0
$EndComp
$Comp
L Device:R R42
U 1 1 614580E2
P 8050 1400
F 0 "R42" V 7843 1400 50 0000 C CNN
F 1 "140/1%" V 7934 1400 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 1400 50 0001 C CNN
F 3 "~" H 8050 1400 50 0001 C CNN
1 8050 1400
0 1 1 0
$EndComp
$Comp
L Device:R R41
U 1 1 614580DC
P 8050 1300
F 0 "R41" V 7843 1300 50 0000 C CNN
F 1 "140/1%" V 7934 1300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 1300 50 0001 C CNN
F 3 "~" H 8050 1300 50 0001 C CNN
1 8050 1300
0 1 1 0
$EndComp
Text HLabel 8250 1200 2 50 Input ~ 0
FPGA_EEM0_1_P
Wire Wire Line
8200 1200 9050 1200
Wire Wire Line
8200 1100 8700 1100
Text HLabel 8250 1100 2 50 Input ~ 0
FPGA_EEM0_1_N
Wire Wire Line
9050 1100 9000 1100
Wire Wire Line
9050 1200 9050 1100
Wire Wire Line
7850 1200 7900 1200
Wire Wire Line
7850 1100 7900 1100
$Comp
L Device:R R87
U 1 1 613AEA51
P 8850 1100
F 0 "R87" V 8643 1100 50 0000 C CNN
F 1 "100/1%" V 8734 1100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 1100 50 0001 C CNN
F 3 "~" H 8850 1100 50 0001 C CNN
1 8850 1100
0 1 1 0
$EndComp
$Comp
L Device:R R40
U 1 1 613952D3
P 8050 1200
F 0 "R40" V 7843 1200 50 0000 C CNN
F 1 "140/1%" V 7934 1200 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 1200 50 0001 C CNN
F 3 "~" H 8050 1200 50 0001 C CNN
1 8050 1200
0 1 1 0
$EndComp
$Comp
L Device:R R39
U 1 1 61390A34
P 8050 1100
F 0 "R39" V 7843 1100 50 0000 C CNN
F 1 "140/1%" V 7934 1100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 1100 50 0001 C CNN
F 3 "~" H 8050 1100 50 0001 C CNN
1 8050 1100
0 1 1 0
$EndComp
Wire Wire Line
7850 4600 7900 4600
Wire Wire Line
7850 4500 7900 4500
Text HLabel 8250 4600 2 50 Input ~ 0
FPGA_EEM1_0_P
Wire Wire Line
8200 4600 9050 4600
Wire Wire Line
8200 4500 8700 4500
Text HLabel 8250 4500 2 50 Input ~ 0
FPGA_EEM1_0_N
Wire Wire Line
9050 4500 9000 4500
Wire Wire Line
9050 4600 9050 4500
$Comp
L Device:R R103
U 1 1 60CE4B94
P 8850 4500
F 0 "R103" V 8643 4500 50 0000 C CNN
F 1 "100/1%" V 8734 4500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 4500 50 0001 C CNN
F 3 "~" H 8850 4500 50 0001 C CNN
1 8850 4500
0 1 1 0
$EndComp
$Comp
L Device:R R72
U 1 1 60CE4B9A
P 8050 4600
F 0 "R72" V 7843 4600 50 0000 C CNN
F 1 "140/1%" V 7934 4600 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4600 50 0001 C CNN
F 3 "~" H 8050 4600 50 0001 C CNN
1 8050 4600
0 1 1 0
$EndComp
$Comp
L Device:R R71
U 1 1 60CE4BA0
P 8050 4500
F 0 "R71" V 7843 4500 50 0000 C CNN
F 1 "140/1%" V 7934 4500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4500 50 0001 C CNN
F 3 "~" H 8050 4500 50 0001 C CNN
1 8050 4500
0 1 1 0
$EndComp
Wire Wire Line
7850 4400 7900 4400
Wire Wire Line
7850 4300 7900 4300
Wire Wire Line
7850 4200 7900 4200
Wire Wire Line
7850 4100 7900 4100
Text HLabel 8250 4400 2 50 Input ~ 0
FPGA_EEM1_7_P
Wire Wire Line
8200 4400 9050 4400
Wire Wire Line
8200 4300 8700 4300
Text HLabel 8250 4300 2 50 Input ~ 0
FPGA_EEM1_7_N
Wire Wire Line
9050 4300 9000 4300
Wire Wire Line
9050 4400 9050 4300
$Comp
L Device:R R102
U 1 1 60CE4BB0
P 8850 4300
F 0 "R102" V 8643 4300 50 0000 C CNN
F 1 "100/1%" V 8734 4300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 4300 50 0001 C CNN
F 3 "~" H 8850 4300 50 0001 C CNN
1 8850 4300
0 1 1 0
$EndComp
$Comp
L Device:R R70
U 1 1 60CE4BB6
P 8050 4400
F 0 "R70" V 7843 4400 50 0000 C CNN
F 1 "140/1%" V 7934 4400 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4400 50 0001 C CNN
F 3 "~" H 8050 4400 50 0001 C CNN
1 8050 4400
0 1 1 0
$EndComp
$Comp
L Device:R R69
U 1 1 60CE4BBC
P 8050 4300
F 0 "R69" V 7843 4300 50 0000 C CNN
F 1 "140/1%" V 7934 4300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4300 50 0001 C CNN
F 3 "~" H 8050 4300 50 0001 C CNN
1 8050 4300
0 1 1 0
$EndComp
Text HLabel 8250 4200 2 50 Input ~ 0
FPGA_EEM1_6_P
Wire Wire Line
8200 4200 9050 4200
Wire Wire Line
8200 4100 8700 4100
Text HLabel 8250 4100 2 50 Input ~ 0
FPGA_EEM1_6_N
Wire Wire Line
9050 4100 9000 4100
Wire Wire Line
9050 4200 9050 4100
$Comp
L Device:R R101
U 1 1 60CE4BC8
P 8850 4100
F 0 "R101" V 8643 4100 50 0000 C CNN
F 1 "100/1%" V 8734 4100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 4100 50 0001 C CNN
F 3 "~" H 8850 4100 50 0001 C CNN
1 8850 4100
0 1 1 0
$EndComp
$Comp
L Device:R R68
U 1 1 60CE4BCE
P 8050 4200
F 0 "R68" V 7843 4200 50 0000 C CNN
F 1 "140/1%" V 7934 4200 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4200 50 0001 C CNN
F 3 "~" H 8050 4200 50 0001 C CNN
1 8050 4200
0 1 1 0
$EndComp
$Comp
L Device:R R67
U 1 1 60CE4BD4
P 8050 4100
F 0 "R67" V 7843 4100 50 0000 C CNN
F 1 "140/1%" V 7934 4100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4100 50 0001 C CNN
F 3 "~" H 8050 4100 50 0001 C CNN
1 8050 4100
0 1 1 0
$EndComp
Text HLabel 8250 4000 2 50 Input ~ 0
FPGA_EEM1_5_P
Wire Wire Line
8200 4000 9050 4000
Wire Wire Line
8200 3900 8700 3900
Text HLabel 8250 3900 2 50 Input ~ 0
FPGA_EEM1_5_N
Wire Wire Line
9050 3900 9000 3900
Wire Wire Line
9050 4000 9050 3900
Wire Wire Line
7850 4000 7900 4000
Wire Wire Line
7850 3900 7900 3900
$Comp
L Device:R R100
U 1 1 60CE4BE2
P 8850 3900
F 0 "R100" V 8643 3900 50 0000 C CNN
F 1 "100/1%" V 8734 3900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 3900 50 0001 C CNN
F 3 "~" H 8850 3900 50 0001 C CNN
1 8850 3900
0 1 1 0
$EndComp
$Comp
L Device:R R66
U 1 1 60CE4BE8
P 8050 4000
F 0 "R66" V 7843 4000 50 0000 C CNN
F 1 "140/1%" V 7934 4000 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4000 50 0001 C CNN
F 3 "~" H 8050 4000 50 0001 C CNN
1 8050 4000
0 1 1 0
$EndComp
$Comp
L Device:R R65
U 1 1 60CE4BEE
P 8050 3900
F 0 "R65" V 7843 3900 50 0000 C CNN
F 1 "140/1%" V 7934 3900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3900 50 0001 C CNN
F 3 "~" H 8050 3900 50 0001 C CNN
1 8050 3900
0 1 1 0
$EndComp
Wire Wire Line
7850 3800 7900 3800
Wire Wire Line
7850 3700 7900 3700
Text HLabel 8250 3800 2 50 Input ~ 0
FPGA_EEM1_4_P
Wire Wire Line
8200 3800 9050 3800
Wire Wire Line
8200 3700 8700 3700
Text HLabel 8250 3700 2 50 Input ~ 0
FPGA_EEM1_4_N
Wire Wire Line
9050 3700 9000 3700
Wire Wire Line
9050 3800 9050 3700
$Comp
L Device:R R99
U 1 1 60CE4BFC
P 8850 3700
F 0 "R99" V 8643 3700 50 0000 C CNN
F 1 "100/1%" V 8734 3700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 3700 50 0001 C CNN
F 3 "~" H 8850 3700 50 0001 C CNN
1 8850 3700
0 1 1 0
$EndComp
$Comp
L Device:R R64
U 1 1 60CE4C02
P 8050 3800
F 0 "R64" V 7843 3800 50 0000 C CNN
F 1 "140/1%" V 7934 3800 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3800 50 0001 C CNN
F 3 "~" H 8050 3800 50 0001 C CNN
1 8050 3800
0 1 1 0
$EndComp
$Comp
L Device:R R63
U 1 1 60CE4C08
P 8050 3700
F 0 "R63" V 7843 3700 50 0000 C CNN
F 1 "140/1%" V 7934 3700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3700 50 0001 C CNN
F 3 "~" H 8050 3700 50 0001 C CNN
1 8050 3700
0 1 1 0
$EndComp
Wire Wire Line
7850 3200 7900 3200
Wire Wire Line
7850 3100 7900 3100
Wire Wire Line
7850 3000 7900 3000
Wire Wire Line
7850 2900 7900 2900
Text HLabel 8250 3200 2 50 Input ~ 0
FPGA_EEM1_3_P
Wire Wire Line
8200 3200 9050 3200
Wire Wire Line
8200 3100 8700 3100
Text HLabel 8250 3100 2 50 Input ~ 0
FPGA_EEM1_3_N
Wire Wire Line
9050 3100 9000 3100
Wire Wire Line
9050 3200 9050 3100
$Comp
L Device:R R96
U 1 1 60CE4C18
P 8850 3100
F 0 "R96" V 8643 3100 50 0000 C CNN
F 1 "100/1%" V 8734 3100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 3100 50 0001 C CNN
F 3 "~" H 8850 3100 50 0001 C CNN
1 8850 3100
0 1 1 0
$EndComp
$Comp
L Device:R R58
U 1 1 60CE4C1E
P 8050 3200
F 0 "R58" V 7843 3200 50 0000 C CNN
F 1 "140/1%" V 7934 3200 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3200 50 0001 C CNN
F 3 "~" H 8050 3200 50 0001 C CNN
1 8050 3200
0 1 1 0
$EndComp
$Comp
L Device:R R57
U 1 1 60CE4C24
P 8050 3100
F 0 "R57" V 7843 3100 50 0000 C CNN
F 1 "140/1%" V 7934 3100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3100 50 0001 C CNN
F 3 "~" H 8050 3100 50 0001 C CNN
1 8050 3100
0 1 1 0
$EndComp
Text HLabel 8250 3000 2 50 Input ~ 0
FPGA_EEM1_2_P
Wire Wire Line
8200 3000 9050 3000
Wire Wire Line
8200 2900 8700 2900
Text HLabel 8250 2900 2 50 Input ~ 0
FPGA_EEM1_2_N
Wire Wire Line
9050 2900 9000 2900
Wire Wire Line
9050 3000 9050 2900
$Comp
L Device:R R95
U 1 1 60CE4C30
P 8850 2900
F 0 "R95" V 8643 2900 50 0000 C CNN
F 1 "100/1%" V 8734 2900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 2900 50 0001 C CNN
F 3 "~" H 8850 2900 50 0001 C CNN
1 8850 2900
0 1 1 0
$EndComp
$Comp
L Device:R R56
U 1 1 60CE4C36
P 8050 3000
F 0 "R56" V 7843 3000 50 0000 C CNN
F 1 "140/1%" V 7934 3000 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3000 50 0001 C CNN
F 3 "~" H 8050 3000 50 0001 C CNN
1 8050 3000
0 1 1 0
$EndComp
$Comp
L Device:R R55
U 1 1 60CE4C3C
P 8050 2900
F 0 "R55" V 7843 2900 50 0000 C CNN
F 1 "140/1%" V 7934 2900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 2900 50 0001 C CNN
F 3 "~" H 8050 2900 50 0001 C CNN
1 8050 2900
0 1 1 0
$EndComp
Text HLabel 8250 2800 2 50 Input ~ 0
FPGA_EEM1_1_P
Wire Wire Line
8200 2800 9050 2800
Wire Wire Line
8200 2700 8700 2700
Text HLabel 8250 2700 2 50 Input ~ 0
FPGA_EEM1_1_N
Wire Wire Line
9050 2700 9000 2700
Wire Wire Line
9050 2800 9050 2700
Wire Wire Line
7850 2800 7900 2800
Wire Wire Line
7850 2700 7900 2700
$Comp
L Device:R R94
U 1 1 60CE4C4A
P 8850 2700
F 0 "R94" V 8643 2700 50 0000 C CNN
F 1 "100/1%" V 8734 2700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 2700 50 0001 C CNN
F 3 "~" H 8850 2700 50 0001 C CNN
1 8850 2700
0 1 1 0
$EndComp
$Comp
L Device:R R54
U 1 1 60CE4C50
P 8050 2800
F 0 "R54" V 7843 2800 50 0000 C CNN
F 1 "140/1%" V 7934 2800 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 2800 50 0001 C CNN
F 3 "~" H 8050 2800 50 0001 C CNN
1 8050 2800
0 1 1 0
$EndComp
$Comp
L Device:R R53
U 1 1 60CE4C56
P 8050 2700
F 0 "R53" V 7843 2700 50 0000 C CNN
F 1 "140/1%" V 7934 2700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 2700 50 0001 C CNN
F 3 "~" H 8050 2700 50 0001 C CNN
1 8050 2700
0 1 1 0
$EndComp
Wire Wire Line
7850 3400 7900 3400
Wire Wire Line
7850 3300 7900 3300
Text HLabel 8250 3400 2 50 Input ~ 0
FPGA_EEM2_0_P
Wire Wire Line
8200 3400 9050 3400
Wire Wire Line
8200 3300 8700 3300
Text HLabel 8250 3300 2 50 Input ~ 0
FPGA_EEM2_0_N
Wire Wire Line
9050 3300 9000 3300
Wire Wire Line
9050 3400 9050 3300
$Comp
L Device:R R97
U 1 1 60DF7DC6
P 8850 3300
AR Path="/60C0E996/60DF7DC6" Ref="R97" Part="1"
AR Path="/60C2FDBB/60DF7DC6" Ref="R?" Part="1"
F 0 "R97" V 8643 3300 50 0000 C CNN
F 1 "100/1%" V 8734 3300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 3300 50 0001 C CNN
F 3 "~" H 8850 3300 50 0001 C CNN
1 8850 3300
0 1 1 0
$EndComp
$Comp
L Device:R R60
U 1 1 60DF7DCC
P 8050 3400
AR Path="/60C0E996/60DF7DCC" Ref="R60" Part="1"
AR Path="/60C2FDBB/60DF7DCC" Ref="R?" Part="1"
F 0 "R60" V 7843 3400 50 0000 C CNN
F 1 "140/1%" V 7934 3400 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3400 50 0001 C CNN
F 3 "~" H 8050 3400 50 0001 C CNN
1 8050 3400
0 1 1 0
$EndComp
$Comp
L Device:R R59
U 1 1 60DF7DD2
P 8050 3300
AR Path="/60C0E996/60DF7DD2" Ref="R59" Part="1"
AR Path="/60C2FDBB/60DF7DD2" Ref="R?" Part="1"
F 0 "R59" V 7843 3300 50 0000 C CNN
F 1 "140/1%" V 7934 3300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 3300 50 0001 C CNN
F 3 "~" H 8050 3300 50 0001 C CNN
1 8050 3300
0 1 1 0
$EndComp
Wire Wire Line
7850 6000 7900 6000
Wire Wire Line
7850 5900 7900 5900
Wire Wire Line
7850 5800 7900 5800
Wire Wire Line
7850 5700 7900 5700
Text HLabel 8250 6000 2 50 Input ~ 0
FPGA_EEM2_7_P
Wire Wire Line
8200 6000 9050 6000
Wire Wire Line
8200 5900 8700 5900
Text HLabel 8250 5900 2 50 Input ~ 0
FPGA_EEM2_7_N
Wire Wire Line
9050 5900 9000 5900
Wire Wire Line
9050 6000 9050 5900
$Comp
L Device:R R110
U 1 1 60DF7DE2
P 8850 5900
AR Path="/60C0E996/60DF7DE2" Ref="R110" Part="1"
AR Path="/60C2FDBB/60DF7DE2" Ref="R?" Part="1"
F 0 "R110" V 8643 5900 50 0000 C CNN
F 1 "100/1%" V 8734 5900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 5900 50 0001 C CNN
F 3 "~" H 8850 5900 50 0001 C CNN
1 8850 5900
0 1 1 0
$EndComp
$Comp
L Device:R R86
U 1 1 60DF7DE8
P 8050 6000
AR Path="/60C0E996/60DF7DE8" Ref="R86" Part="1"
AR Path="/60C2FDBB/60DF7DE8" Ref="R?" Part="1"
F 0 "R86" V 7843 6000 50 0000 C CNN
F 1 "140/1%" V 7934 6000 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 6000 50 0001 C CNN
F 3 "~" H 8050 6000 50 0001 C CNN
1 8050 6000
0 1 1 0
$EndComp
$Comp
L Device:R R85
U 1 1 60DF7DEE
P 8050 5900
AR Path="/60C0E996/60DF7DEE" Ref="R85" Part="1"
AR Path="/60C2FDBB/60DF7DEE" Ref="R?" Part="1"
F 0 "R85" V 7843 5900 50 0000 C CNN
F 1 "140/1%" V 7934 5900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5900 50 0001 C CNN
F 3 "~" H 8050 5900 50 0001 C CNN
1 8050 5900
0 1 1 0
$EndComp
Text HLabel 8250 5800 2 50 Input ~ 0
FPGA_EEM2_6_P
Wire Wire Line
8200 5800 9050 5800
Wire Wire Line
8200 5700 8700 5700
Text HLabel 8250 5700 2 50 Input ~ 0
FPGA_EEM2_6_N
Wire Wire Line
9050 5700 9000 5700
Wire Wire Line
9050 5800 9050 5700
$Comp
L Device:R R109
U 1 1 60DF7DFA
P 8850 5700
AR Path="/60C0E996/60DF7DFA" Ref="R109" Part="1"
AR Path="/60C2FDBB/60DF7DFA" Ref="R?" Part="1"
F 0 "R109" V 8643 5700 50 0000 C CNN
F 1 "100/1%" V 8734 5700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 5700 50 0001 C CNN
F 3 "~" H 8850 5700 50 0001 C CNN
1 8850 5700
0 1 1 0
$EndComp
$Comp
L Device:R R84
U 1 1 60DF7E00
P 8050 5800
AR Path="/60C0E996/60DF7E00" Ref="R84" Part="1"
AR Path="/60C2FDBB/60DF7E00" Ref="R?" Part="1"
F 0 "R84" V 7843 5800 50 0000 C CNN
F 1 "140/1%" V 7934 5800 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5800 50 0001 C CNN
F 3 "~" H 8050 5800 50 0001 C CNN
1 8050 5800
0 1 1 0
$EndComp
$Comp
L Device:R R83
U 1 1 60DF7E06
P 8050 5700
AR Path="/60C0E996/60DF7E06" Ref="R83" Part="1"
AR Path="/60C2FDBB/60DF7E06" Ref="R?" Part="1"
F 0 "R83" V 7843 5700 50 0000 C CNN
F 1 "140/1%" V 7934 5700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5700 50 0001 C CNN
F 3 "~" H 8050 5700 50 0001 C CNN
1 8050 5700
0 1 1 0
$EndComp
Text HLabel 8250 5600 2 50 Input ~ 0
FPGA_EEM2_5_P
Wire Wire Line
8200 5600 9050 5600
Wire Wire Line
8200 5500 8700 5500
Text HLabel 8250 5500 2 50 Input ~ 0
FPGA_EEM2_5_N
Wire Wire Line
9050 5500 9000 5500
Wire Wire Line
9050 5600 9050 5500
Wire Wire Line
7850 5600 7900 5600
Wire Wire Line
7850 5500 7900 5500
$Comp
L Device:R R108
U 1 1 60DF7E14
P 8850 5500
AR Path="/60C0E996/60DF7E14" Ref="R108" Part="1"
AR Path="/60C2FDBB/60DF7E14" Ref="R?" Part="1"
F 0 "R108" V 8643 5500 50 0000 C CNN
F 1 "100/1%" V 8734 5500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 5500 50 0001 C CNN
F 3 "~" H 8850 5500 50 0001 C CNN
1 8850 5500
0 1 1 0
$EndComp
$Comp
L Device:R R82
U 1 1 60DF7E1A
P 8050 5600
AR Path="/60C0E996/60DF7E1A" Ref="R82" Part="1"
AR Path="/60C2FDBB/60DF7E1A" Ref="R?" Part="1"
F 0 "R82" V 7843 5600 50 0000 C CNN
F 1 "140/1%" V 7934 5600 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5600 50 0001 C CNN
F 3 "~" H 8050 5600 50 0001 C CNN
1 8050 5600
0 1 1 0
$EndComp
$Comp
L Device:R R81
U 1 1 60DF7E20
P 8050 5500
AR Path="/60C0E996/60DF7E20" Ref="R81" Part="1"
AR Path="/60C2FDBB/60DF7E20" Ref="R?" Part="1"
F 0 "R81" V 7843 5500 50 0000 C CNN
F 1 "140/1%" V 7934 5500 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5500 50 0001 C CNN
F 3 "~" H 8050 5500 50 0001 C CNN
1 8050 5500
0 1 1 0
$EndComp
Wire Wire Line
7850 5400 7900 5400
Wire Wire Line
7850 5300 7900 5300
Text HLabel 8250 5400 2 50 Input ~ 0
FPGA_EEM2_4_P
Wire Wire Line
8200 5400 9050 5400
Wire Wire Line
8200 5300 8700 5300
Text HLabel 8250 5300 2 50 Input ~ 0
FPGA_EEM2_4_N
Wire Wire Line
9050 5300 9000 5300
Wire Wire Line
9050 5400 9050 5300
$Comp
L Device:R R107
U 1 1 60DF7E2E
P 8850 5300
AR Path="/60C0E996/60DF7E2E" Ref="R107" Part="1"
AR Path="/60C2FDBB/60DF7E2E" Ref="R?" Part="1"
F 0 "R107" V 8643 5300 50 0000 C CNN
F 1 "100/1%" V 8734 5300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 5300 50 0001 C CNN
F 3 "~" H 8850 5300 50 0001 C CNN
1 8850 5300
0 1 1 0
$EndComp
$Comp
L Device:R R80
U 1 1 60DF7E34
P 8050 5400
AR Path="/60C0E996/60DF7E34" Ref="R80" Part="1"
AR Path="/60C2FDBB/60DF7E34" Ref="R?" Part="1"
F 0 "R80" V 7843 5400 50 0000 C CNN
F 1 "140/1%" V 7934 5400 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5400 50 0001 C CNN
F 3 "~" H 8050 5400 50 0001 C CNN
1 8050 5400
0 1 1 0
$EndComp
$Comp
L Device:R R79
U 1 1 60DF7E3A
P 8050 5300
AR Path="/60C0E996/60DF7E3A" Ref="R79" Part="1"
AR Path="/60C2FDBB/60DF7E3A" Ref="R?" Part="1"
F 0 "R79" V 7843 5300 50 0000 C CNN
F 1 "140/1%" V 7934 5300 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5300 50 0001 C CNN
F 3 "~" H 8050 5300 50 0001 C CNN
1 8050 5300
0 1 1 0
$EndComp
Wire Wire Line
7850 5200 7900 5200
Wire Wire Line
7850 5100 7900 5100
Wire Wire Line
7850 5000 7900 5000
Wire Wire Line
7850 4900 7900 4900
Text HLabel 8250 5200 2 50 Input ~ 0
FPGA_EEM2_3_P
Wire Wire Line
8200 5200 9050 5200
Wire Wire Line
8200 5100 8700 5100
Text HLabel 8250 5100 2 50 Input ~ 0
FPGA_EEM2_3_N
Wire Wire Line
9050 5100 9000 5100
Wire Wire Line
9050 5200 9050 5100
$Comp
L Device:R R106
U 1 1 60DF7E4A
P 8850 5100
AR Path="/60C0E996/60DF7E4A" Ref="R106" Part="1"
AR Path="/60C2FDBB/60DF7E4A" Ref="R?" Part="1"
F 0 "R106" V 8643 5100 50 0000 C CNN
F 1 "100/1%" V 8734 5100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 5100 50 0001 C CNN
F 3 "~" H 8850 5100 50 0001 C CNN
1 8850 5100
0 1 1 0
$EndComp
$Comp
L Device:R R78
U 1 1 60DF7E50
P 8050 5200
AR Path="/60C0E996/60DF7E50" Ref="R78" Part="1"
AR Path="/60C2FDBB/60DF7E50" Ref="R?" Part="1"
F 0 "R78" V 7843 5200 50 0000 C CNN
F 1 "140/1%" V 7934 5200 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5200 50 0001 C CNN
F 3 "~" H 8050 5200 50 0001 C CNN
1 8050 5200
0 1 1 0
$EndComp
$Comp
L Device:R R77
U 1 1 60DF7E56
P 8050 5100
AR Path="/60C0E996/60DF7E56" Ref="R77" Part="1"
AR Path="/60C2FDBB/60DF7E56" Ref="R?" Part="1"
F 0 "R77" V 7843 5100 50 0000 C CNN
F 1 "140/1%" V 7934 5100 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5100 50 0001 C CNN
F 3 "~" H 8050 5100 50 0001 C CNN
1 8050 5100
0 1 1 0
$EndComp
Text HLabel 8250 5000 2 50 Input ~ 0
FPGA_EEM2_2_P
Wire Wire Line
8200 5000 9050 5000
Wire Wire Line
8200 4900 8700 4900
Text HLabel 8250 4900 2 50 Input ~ 0
FPGA_EEM2_2_N
Wire Wire Line
9050 4900 9000 4900
Wire Wire Line
9050 5000 9050 4900
$Comp
L Device:R R105
U 1 1 60DF7E62
P 8850 4900
AR Path="/60C0E996/60DF7E62" Ref="R105" Part="1"
AR Path="/60C2FDBB/60DF7E62" Ref="R?" Part="1"
F 0 "R105" V 8643 4900 50 0000 C CNN
F 1 "100/1%" V 8734 4900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 4900 50 0001 C CNN
F 3 "~" H 8850 4900 50 0001 C CNN
1 8850 4900
0 1 1 0
$EndComp
$Comp
L Device:R R76
U 1 1 60DF7E68
P 8050 5000
AR Path="/60C0E996/60DF7E68" Ref="R76" Part="1"
AR Path="/60C2FDBB/60DF7E68" Ref="R?" Part="1"
F 0 "R76" V 7843 5000 50 0000 C CNN
F 1 "140/1%" V 7934 5000 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 5000 50 0001 C CNN
F 3 "~" H 8050 5000 50 0001 C CNN
1 8050 5000
0 1 1 0
$EndComp
$Comp
L Device:R R75
U 1 1 60DF7E6E
P 8050 4900
AR Path="/60C0E996/60DF7E6E" Ref="R75" Part="1"
AR Path="/60C2FDBB/60DF7E6E" Ref="R?" Part="1"
F 0 "R75" V 7843 4900 50 0000 C CNN
F 1 "140/1%" V 7934 4900 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4900 50 0001 C CNN
F 3 "~" H 8050 4900 50 0001 C CNN
1 8050 4900
0 1 1 0
$EndComp
Text HLabel 8250 4800 2 50 Input ~ 0
FPGA_EEM2_1_P
Wire Wire Line
8200 4800 9050 4800
Wire Wire Line
8200 4700 8700 4700
Text HLabel 8250 4700 2 50 Input ~ 0
FPGA_EEM2_1_N
Wire Wire Line
9050 4700 9000 4700
Wire Wire Line
9050 4800 9050 4700
Wire Wire Line
7850 4800 7900 4800
Wire Wire Line
7850 4700 7900 4700
$Comp
L Device:R R104
U 1 1 60DF7E7C
P 8850 4700
AR Path="/60C0E996/60DF7E7C" Ref="R104" Part="1"
AR Path="/60C2FDBB/60DF7E7C" Ref="R?" Part="1"
F 0 "R104" V 8643 4700 50 0000 C CNN
F 1 "100/1%" V 8734 4700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 8780 4700 50 0001 C CNN
F 3 "~" H 8850 4700 50 0001 C CNN
1 8850 4700
0 1 1 0
$EndComp
$Comp
L Device:R R74
U 1 1 60DF7E82
P 8050 4800
AR Path="/60C0E996/60DF7E82" Ref="R74" Part="1"
AR Path="/60C2FDBB/60DF7E82" Ref="R?" Part="1"
F 0 "R74" V 7843 4800 50 0000 C CNN
F 1 "140/1%" V 7934 4800 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4800 50 0001 C CNN
F 3 "~" H 8050 4800 50 0001 C CNN
1 8050 4800
0 1 1 0
$EndComp
$Comp
L Device:R R73
U 1 1 60DF7E88
P 8050 4700
AR Path="/60C0E996/60DF7E88" Ref="R73" Part="1"
AR Path="/60C2FDBB/60DF7E88" Ref="R?" Part="1"
F 0 "R73" V 7843 4700 50 0000 C CNN
F 1 "140/1%" V 7934 4700 50 0000 C CNN
F 2 "Resistor_SMD:R_0603_1608Metric" V 7980 4700 50 0001 C CNN
F 3 "~" H 8050 4700 50 0001 C CNN
1 8050 4700
0 1 1 0
$EndComp
$Comp
L Power_Protection:PRTR5V0U2X D11
U 1 1 610B0EF3
P 1100 6950
F 0 "D11" H 1644 6996 50 0000 L CNN
F 1 "PRTR5V0U2X" H 1644 6905 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-143" H 1160 6950 50 0001 C CNN
F 3 "https://assets.nexperia.com/documents/data-sheet/PRTR5V0U2X.pdf" H 1160 6950 50 0001 C CNN
1 1100 6950
1 0 0 -1
$EndComp
Text Label 3800 900 0 50 ~ 0
I2C_0_SDA
Text Label 3800 1000 0 50 ~ 0
I2C_0_SCL
Text Label 3800 1100 0 50 ~ 0
I2C_1_SDA
Text Label 3800 1200 0 50 ~ 0
I2C_1_SCL
Text Label 3800 1300 0 50 ~ 0
I2C_2_SDA
Text Label 3800 1400 0 50 ~ 0
I2C_2_SCL
$Comp
L Power_Protection:PRTR5V0U2X D12
U 1 1 6137EFAD
P 2200 6950
F 0 "D12" H 2744 6996 50 0000 L CNN
F 1 "PRTR5V0U2X" H 2744 6905 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-143" H 2260 6950 50 0001 C CNN
F 3 "https://assets.nexperia.com/documents/data-sheet/PRTR5V0U2X.pdf" H 2260 6950 50 0001 C CNN
1 2200 6950
1 0 0 -1
$EndComp
Wire Wire Line
4900 7050 4900 7100
Connection ~ 4900 7100
Wire Wire Line
4900 7100 4900 7200
Wire Wire Line
4150 7050 4150 7100
Connection ~ 4150 7100
$Comp
L Power_Protection:PRTR5V0U2X D13
U 1 1 6150DB5A
P 3300 6950
F 0 "D13" H 3844 6996 50 0000 L CNN
F 1 "PRTR5V0U2X" H 3844 6905 50 0000 L CNN
F 2 "Package_TO_SOT_SMD:SOT-143" H 3360 6950 50 0001 C CNN
F 3 "https://assets.nexperia.com/documents/data-sheet/PRTR5V0U2X.pdf" H 3360 6950 50 0001 C CNN
1 3300 6950
1 0 0 -1
$EndComp
Text HLabel 3850 900 2 50 Input ~ 0
FPGA_IIC0_SDA
Text HLabel 3850 1000 2 50 Input ~ 0
FPGA_IIC0_SCL
Text HLabel 3850 1100 2 50 Input ~ 0
FPGA_IIC1_SDA
Text HLabel 3850 1200 2 50 Input ~ 0
FPGA_IIC1_SCL
Text HLabel 3850 1300 2 50 Input ~ 0
FPGA_IIC2_SDA
Text HLabel 3850 1400 2 50 Input ~ 0
FPGA_IIC2_SCL
Wire Wire Line
3750 900 3850 900
Wire Wire Line
3750 1000 3850 1000
Wire Wire Line
3750 1100 3850 1100
Wire Wire Line
3750 1200 3850 1200
Wire Wire Line
3750 1300 3850 1300
Wire Wire Line
3750 1400 3850 1400
Wire Wire Line
1100 6400 1100 6450
Wire Wire Line
2200 6450 2200 6400
Wire Wire Line
1100 7450 1100 7500
Wire Wire Line
3300 7500 3300 7450
Wire Wire Line
2200 7450 2200 7500
Text Label 600 7050 3 50 ~ 0
I2C_0_SDA
Text Label 1600 7050 3 50 ~ 0
I2C_0_SCL
Text Label 1700 7050 3 50 ~ 0
I2C_1_SDA
Text Label 2700 7050 3 50 ~ 0
I2C_1_SCL
Text Label 2800 7050 3 50 ~ 0
I2C_2_SDA
Text Label 3800 7050 3 50 ~ 0
I2C_2_SCL
Wire Wire Line
3800 7050 3800 6950
Wire Wire Line
2800 6950 2800 7050
Wire Wire Line
2700 7050 2700 6950
Wire Wire Line
1700 7050 1700 6950
Wire Wire Line
1600 7050 1600 6950
Wire Wire Line
600 7050 600 6950
Text HLabel 1850 900 2 50 Input ~ 0
FPGA_FSMC_A0
Text HLabel 1850 1000 2 50 Input ~ 0
FPGA_FSMC_A1
Text HLabel 1850 1100 2 50 Input ~ 0
FPGA_FSMC_A2
Text HLabel 1850 1200 2 50 Input ~ 0
FPGA_FSMC_A3
Text HLabel 1850 1300 2 50 Input ~ 0
FPGA_FSMC_A4
Text HLabel 1850 1400 2 50 Input ~ 0
FPGA_FSMC_A5
Text HLabel 1850 1500 2 50 Input ~ 0
FPGA_FSMC_A6
Text HLabel 1850 1600 2 50 Input ~ 0
FPGA_FSMC_A7
Text HLabel 1850 1700 2 50 Input ~ 0
FPGA_FSMC_D0
Text HLabel 1850 1800 2 50 Input ~ 0
FPGA_FSMC_D1
Text HLabel 1850 1900 2 50 Input ~ 0
FPGA_FSMC_D2
Text HLabel 1850 2000 2 50 Input ~ 0
FPGA_FSMC_D3
Text HLabel 1850 2100 2 50 Input ~ 0
FPGA_FSMC_D4
Text HLabel 1850 2200 2 50 Input ~ 0
FPGA_FSMC_D5
Text HLabel 1850 2300 2 50 Input ~ 0
FPGA_FSMC_D6
Text HLabel 1850 2400 2 50 Input ~ 0
FPGA_FSMC_D7
Text HLabel 1850 2500 2 50 Input ~ 0
FPGA_FSMC_D8
Text HLabel 1850 2600 2 50 Input ~ 0
FPGA_FSMC_D9
Text HLabel 1850 2700 2 50 Input ~ 0
FPGA_FSMC_D10
Text HLabel 1850 2800 2 50 Input ~ 0
FPGA_FSMC_D11
Text HLabel 1850 2900 2 50 Input ~ 0
FPGA_FSMC_D12
Text HLabel 1850 3000 2 50 Input ~ 0
FPGA_FSMC_D13
Text HLabel 1850 3100 2 50 Input ~ 0
FPGA_FSMC_D14
Text HLabel 1850 3200 2 50 Input ~ 0
FPGA_FSMC_D15
Wire Wire Line
1850 900 1800 900
Wire Wire Line
1850 1000 1800 1000
Wire Wire Line
1850 1100 1800 1100
Wire Wire Line
1850 1200 1800 1200
Wire Wire Line
1850 1300 1800 1300
Wire Wire Line
1850 1400 1800 1400
Wire Wire Line
1850 1500 1800 1500
Wire Wire Line
1850 1600 1800 1600
Wire Wire Line
1850 1700 1800 1700
Wire Wire Line
1850 1800 1800 1800
Wire Wire Line
1850 1900 1800 1900
Wire Wire Line
1850 2000 1800 2000
Wire Wire Line
1850 2100 1800 2100
Wire Wire Line
1850 2200 1800 2200
Wire Wire Line
1850 2300 1800 2300
Wire Wire Line
1850 2400 1800 2400
Wire Wire Line
1850 2500 1800 2500
Wire Wire Line
1850 2600 1800 2600
Wire Wire Line
1850 2700 1800 2700
Wire Wire Line
1850 2800 1800 2800
Wire Wire Line
1850 2900 1800 2900
Wire Wire Line
1850 3000 1800 3000
Wire Wire Line
1850 3100 1800 3100
Wire Wire Line
1850 3200 1800 3200
$Comp
L Memory_Flash:AT25SF081-SSHD-X U14
U 1 1 6211163A
P 6500 6850
F 0 "U14" H 7144 6896 50 0000 L CNN
F 1 "AT25SF081-SSHD-X" H 7144 6805 50 0000 L CNN
F 2 "Package_SO:SOIC-8_3.9x4.9mm_P1.27mm" H 6500 6250 50 0001 C CNN
F 3 "https://www.adestotech.com/wp-content/uploads/DS-AT25SF081_045.pdf" H 6500 6850 50 0001 C CNN
1 6500 6850
1 0 0 -1
$EndComp
Wire Wire Line
1100 6400 2200 6400
Wire Wire Line
3300 6400 3300 6450
Connection ~ 2200 6400
Wire Wire Line
2200 6400 3300 6400
Wire Wire Line
3300 7500 2200 7500
Connection ~ 2200 7500
Wire Wire Line
2200 7500 1100 7500
$Comp
L power:GND #PWR068
U 1 1 62303F6D
P 2200 7550
F 0 "#PWR068" H 2200 7300 50 0001 C CNN
F 1 "GND" H 2205 7377 50 0000 C CNN
F 2 "" H 2200 7550 50 0001 C CNN
F 3 "" H 2200 7550 50 0001 C CNN
1 2200 7550
1 0 0 -1
$EndComp
$Comp
L power:+3V3 #PWR067
U 1 1 6230BD7E
P 2200 6000
F 0 "#PWR067" H 2200 5850 50 0001 C CNN
F 1 "+3V3" H 2215 6173 50 0000 C CNN
F 2 "" H 2200 6000 50 0001 C CNN
F 3 "" H 2200 6000 50 0001 C CNN
1 2200 6000
1 0 0 -1
$EndComp
$Comp
L Device:D_Schottky D?
U 1 1 6231DCDB
P 2200 6200
AR Path="/60E4702B/6231DCDB" Ref="D?" Part="1"
AR Path="/60C0E996/6231DCDB" Ref="D14" Part="1"
F 0 "D14" V 2154 6280 50 0000 L CNN
F 1 "SS16" V 2245 6280 50 0000 L CNN
F 2 "Diode_SMD:D_SMA" H 2200 6200 50 0001 C CNN
F 3 "~" H 2200 6200 50 0001 C CNN
1 2200 6200
0 -1 -1 0
$EndComp
Wire Wire Line
2200 6050 2200 6000
Wire Wire Line
2200 6350 2200 6400
Text HLabel 5800 5300 2 50 Input ~ 0
FPGA_CSBSEL0
Text HLabel 5800 5400 2 50 Input ~ 0
FPGA_CSBSEL1
Text HLabel 5800 5900 2 50 Input ~ 0
FPGA_SPI_SDO
Text HLabel 5800 5800 2 50 Input ~ 0
FPGA_SPI_SDI
Text HLabel 5800 5600 2 50 Input ~ 0
FPGA_SPI_SS
Text HLabel 5800 5700 2 50 Input ~ 0
FPGA_SPI_SCK
Wire Wire Line
5800 5300 5750 5300
Wire Wire Line
5800 5400 5750 5400
Wire Wire Line
5800 5600 5750 5600
Wire Wire Line
5800 5700 5750 5700
Wire Wire Line
5800 5800 5750 5800
Wire Wire Line
5800 5900 5750 5900
Wire Wire Line
5750 6100 5800 6100
Wire Wire Line
5750 6200 5800 6200
Text HLabel 5800 6100 2 50 Input ~ 0
FPGA_CDONE
Text HLabel 5800 6200 2 50 Input ~ 0
FPGA_CRESET
Wire Wire Line
5900 7050 5850 7050
Wire Wire Line
5850 6950 5900 6950
$Comp
L power:+3V3 #PWR070
U 1 1 627E070D
P 6500 6300
F 0 "#PWR070" H 6500 6150 50 0001 C CNN
F 1 "+3V3" H 6515 6473 50 0000 C CNN
F 2 "" H 6500 6300 50 0001 C CNN
F 3 "" H 6500 6300 50 0001 C CNN
1 6500 6300
1 0 0 -1
$EndComp
$Comp
L power:+3V3 #PWR069
U 1 1 627E243D
P 5850 7150
F 0 "#PWR069" H 5850 7000 50 0001 C CNN
F 1 "+3V3" H 5865 7323 50 0000 C CNN
F 2 "" H 5850 7150 50 0001 C CNN
F 3 "" H 5850 7150 50 0001 C CNN
1 5850 7150
-1 0 0 1
$EndComp
$Comp
L power:GND #PWR071
U 1 1 627E46CA
P 6500 7400
F 0 "#PWR071" H 6500 7150 50 0001 C CNN
F 1 "GND" H 6505 7227 50 0000 C CNN
F 2 "" H 6500 7400 50 0001 C CNN
F 3 "" H 6500 7400 50 0001 C CNN
1 6500 7400
1 0 0 -1
$EndComp
Wire Wire Line
6500 7350 6500 7400
Wire Wire Line
5850 6950 5850 7050
Connection ~ 5850 7050
Wire Wire Line
5850 7050 5850 7150
Wire Wire Line
6500 6350 6500 6300
Text Label 5750 5700 0 50 ~ 0
SPI_SCK
Text Label 5750 5600 0 50 ~ 0
SPI_SS
Text Label 5750 5900 0 50 ~ 0
SPI_MOSI
Text Label 5750 5800 0 50 ~ 0
SPI_MISO
Text Label 5850 6750 2 50 ~ 0
SPI_SCK
Text Label 5850 6850 2 50 ~ 0
SPI_SS
Text Label 5850 6650 2 50 ~ 0
SPI_MOSI
Text Label 7150 6650 0 50 ~ 0
SPI_MISO
Wire Wire Line
7150 6650 7100 6650
Wire Wire Line
5850 6650 5900 6650
Wire Wire Line
5850 6750 5900 6750
Wire Wire Line
5850 6850 5900 6850
Text Label 5750 6100 0 50 ~ 0
CDONE
Text Label 5750 6200 0 50 ~ 0
CRESET
Text Label 8450 7000 2 50 ~ 0
SPI_SS
Text Label 8450 6900 2 50 ~ 0
CRESET
Text Label 8450 6800 2 50 ~ 0
CDONE
Wire Wire Line
8450 6900 8550 6900
Wire Wire Line
8550 7000 8450 7000
Wire Wire Line
8550 6800 8450 6800
Wire Wire Line
9050 6900 8950 6900
$Comp
L power:+3V3 #PWR072
U 1 1 62D9CC4C
P 9050 6900
F 0 "#PWR072" H 9050 6750 50 0001 C CNN
F 1 "+3V3" V 9065 7028 50 0000 L CNN
F 2 "" H 9050 6900 50 0001 C CNN
F 3 "" H 9050 6900 50 0001 C CNN
1 9050 6900
0 1 1 0
$EndComp
Wire Wire Line
8950 6900 8950 7000
Connection ~ 8950 6900
Wire Wire Line
8850 6900 8950 6900
Wire Wire Line
8950 7000 8850 7000
Wire Wire Line
8950 6800 8950 6900
Wire Wire Line
8850 6800 8950 6800
$Comp
L Device:R R113
U 1 1 62CE70DD
P 8700 7000
F 0 "R113" V 8493 7000 50 0000 C CNN
F 1 "10k" V 8584 7000 50 0000 C CNN
2021-06-17 10:52:33 +08:00
F 2 "Resistor_SMD:R_0603_1608Metric" V 8630 7000 50 0001 C CNN
2021-06-16 17:13:34 +08:00
F 3 "~" H 8700 7000 50 0001 C CNN
1 8700 7000
0 1 1 0
$EndComp
$Comp
L Device:R R112
U 1 1 62CBFB4D
P 8700 6900
F 0 "R112" V 8493 6900 50 0000 C CNN
F 1 "10k" V 8584 6900 50 0000 C CNN
2021-06-17 10:52:33 +08:00
F 2 "Resistor_SMD:R_0603_1608Metric" V 8630 6900 50 0001 C CNN
2021-06-16 17:13:34 +08:00
F 3 "~" H 8700 6900 50 0001 C CNN
1 8700 6900
0 1 1 0
$EndComp
$Comp
L Device:R R111
U 1 1 62C9E4F5
P 8700 6800
F 0 "R111" V 8493 6800 50 0000 C CNN
F 1 "10k" V 8584 6800 50 0000 C CNN
2021-06-17 10:52:33 +08:00
F 2 "Resistor_SMD:R_0603_1608Metric" V 8630 6800 50 0001 C CNN
2021-06-16 17:13:34 +08:00
F 3 "~" H 8700 6800 50 0001 C CNN
1 8700 6800
0 1 1 0
$EndComp
$EndSCHEMATC