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Syrostan-MCU-C
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master
Syrostan-MCU-C
/
FPGA
/
lvds
/
top_pre_pack.py
mikelam
cf76348432
EEM output working
2022-01-22 17:50:49 +08:00
2 lines
28 B
Python
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ctx
.
addClock
(
"
clk25
"
,
25.0
)
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