optimize impedance matching for ADC and LVDS (test if 2-layer PCB works fine)
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@ -1,4 +1,4 @@
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update=Tue Aug 24 16:31:47 2021
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update=Thu Aug 26 10:48:36 2021
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version=1
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last_client=kicad
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[general]
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@ -33,6 +33,7 @@ TrackWidth2=0.127
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TrackWidth3=0.254
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TrackWidth4=0.508
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TrackWidth5=0.762
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TrackWidth6=1.27
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ViaDiameter1=0.8
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ViaDrill1=0.4
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ViaDiameter2=0.5
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