sinara-hw/Syrostan-Ext-DIO
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Jack-Zheng 7cddd52ca0 optimize silk labels; add update log
2021-08-31 12:49:59 +08:00
FabricationOutput add logo and fix bugs 2021-08-26 17:05:39 +08:00
Syrostan-Ext-DIO.pretty add logo and fix bugs 2021-08-26 17:05:39 +08:00
.gitignore init project and fix pogo pin positions 2021-08-17 13:41:04 +08:00
fp-lib-table init project and fix pogo pin positions 2021-08-17 13:41:04 +08:00
logo.bmp add logo and fix bugs 2021-08-26 17:05:39 +08:00
PogoPinPosition.dxf init project and fix pogo pin positions 2021-08-17 13:41:04 +08:00
sym-lib-table finish schematic 2021-08-20 16:17:48 +08:00
Syrostan-Ext-DIO-cache.lib change switch chips to MOS; finish PCB routing 2021-08-24 17:28:24 +08:00
Syrostan-Ext-DIO.bck finish schematic 2021-08-20 16:17:48 +08:00
Syrostan-Ext-DIO.dcm finish schematic 2021-08-20 16:17:48 +08:00
Syrostan-Ext-DIO.kicad_pcb optimize silk labels; add update log 2021-08-31 12:49:59 +08:00
Syrostan-Ext-DIO.lib finish schematic 2021-08-20 16:17:48 +08:00
Syrostan-Ext-DIO.pro optimize impedance matching for ADC and LVDS (test if 2-layer PCB works fine) 2021-08-26 11:45:31 +08:00
Syrostan-Ext-DIO.sch change switch chips to MOS; finish PCB routing 2021-08-24 17:28:24 +08:00
update_log.txt optimize silk labels; add update log 2021-08-31 12:49:59 +08:00