• Joined on 2019-03-28
sb10q pushed to master at M-Labs/HeavyX 2019-06-10 14:49:57 +08:00
40f869632b document how to build helloworld soc
sb10q pushed to master at M-Labs/HeavyX 2019-06-09 00:06:22 +08:00
3598e08212 symbiflow: 100MHz timing (HACK)
d9b42a0807 clean up firmware compilation
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sb10q pushed to master at M-Labs/HeavyX 2019-06-08 23:01:41 +08:00
fd05fa560f firmware: compile for riscv32i
328a521632 simplesoc_ecp5: run simulation longer
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sb10q pushed to master at M-Labs/HeavyX 2019-06-08 22:05:43 +08:00
c7bda2b144 compile Rust core crate for riscv32i
03dc4f6e32 add RISCV GCC
033659344f Revert "Revert "reinstate riscv32i""
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sb10q pushed to master at M-Labs/HeavyX 2019-06-08 19:25:39 +08:00
8388018db7 also build riscv64 binutils
b22d85ba52 Revert "reinstate riscv32i"
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sb10q pushed to master at M-Labs/HeavyX 2019-06-08 17:35:30 +08:00
06d825f63d reinstate riscv32i
75e9310097 simplesoc_ecp5: add simulation
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sb10q pushed to master at M-Labs/HeavyX 2019-06-07 23:52:44 +08:00
83ffe66f70 simplesoc_ecp5: add blinking LED
2cfafcdf20 firmware: match simplesoc memory addresses
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sb10q pushed to master at M-Labs/HeavyX 2019-06-06 18:11:55 +08:00
ad4f00e93d simplesoc_ecp5: load firmware
a53c470d17 nmigen: bump
713f644072 minerva: bump
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sb10q pushed to master at M-Labs/HeavyX 2019-06-06 17:27:32 +08:00
a203307108 reorganize
63664ab959 build .bin firmware image
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sb10q pushed to master at M-Labs/HeavyX 2019-06-06 13:19:39 +08:00
d2391e0aa1 build firmware with Nix
sb10q pushed to master at M-Labs/HeavyX 2019-06-06 12:24:53 +08:00
b6c53406ea show LLVM in hydra
sb10q pushed to master at M-Labs/HeavyX 2019-06-06 12:12:41 +08:00
3edb51a646 fix syntax issue
sb10q pushed to master at M-Labs/HeavyX 2019-06-06 12:05:50 +08:00
85f7b2bf15 use overlay instead of passing llvm/rustc/cargo around
78f67f82d3 firmware: simulable demo
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sb10q pushed to master at M-Labs/HeavyX 2019-06-06 00:12:19 +08:00
b5ac2e7303 add simple Rust firmware (WIP)
sb10q pushed to master at M-Labs/HeavyX 2019-06-06 00:07:56 +08:00
f707295646 use the GNU linker
sb10q pushed to master at M-Labs/HeavyX 2019-06-06 00:06:31 +08:00
cf86c11dce binutils: use unknown-elf
sb10q pushed to master at M-Labs/HeavyX 2019-06-05 23:46:31 +08:00
aa1c3726f3 attempt to use lld linker
d5c288c20b rustc: disable lld
1361c6ae9e Revert "llvm: only build x86 and riscv"
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sb10q pushed to master at M-Labs/HeavyX 2019-06-05 23:20:28 +08:00
b17ec6fb1f llvm: only build x86 and riscv
sb10q pushed to master at M-Labs/HeavyX 2019-06-05 23:08:56 +08:00
52cc7722a0 add nix-shell file for firmware compilation
sb10q pushed to master at M-Labs/HeavyX 2019-06-05 23:07:57 +08:00
6ad1d993c6 rustc: remove riscv32i support
f929be260a build cargo
2c3fc22963 Use riscv32imc for Rust core crate
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