examples/tcp_stm32f407.rs

@@ -180,7 +180,7 @@ const APP: () = {
 
             // Read MAC
             let mut eth_mac_addr: [u8; 6] = [0; 6];
-            spi_eth.read_from_mac(&mut eth_mac_addr).unwrap();
+            spi_eth.read_from_mac(&mut eth_mac_addr);
             for i in 0..6 {
                 let byte = eth_mac_addr[i];
                 match i {
@@ -192,8 +192,8 @@ const APP: () = {
             }
 
             // Init Rx/Tx buffers
-            spi_eth.init_rxbuf().unwrap();
-            spi_eth.init_txbuf().unwrap();
+            spi_eth.init_rxbuf();
+            spi_eth.init_txbuf();
             iprintln!(stim0, "Ethernet controller initialized");
 
             // Init smoltcp interface

examples/tx_stm32f407.rs

@@ -102,7 +102,7 @@ const APP: () = {
 
         // Read MAC
         let mut eth_mac_addr: [u8; 6] = [0; 6];
-        spi_eth.read_from_mac(&mut eth_mac_addr).unwrap();
+        spi_eth.read_from_mac(&mut eth_mac_addr);
         for i in 0..6 {
             let byte = eth_mac_addr[i];
             match i {
@@ -114,8 +114,8 @@ const APP: () = {
         }
 
         // Init Rx/Tx buffers
-        spi_eth.init_rxbuf().unwrap();
-        spi_eth.init_txbuf().unwrap();
+        spi_eth.init_rxbuf();
+        spi_eth.init_txbuf();
         iprintln!(stim0, "Ethernet controller initialized");
 
         init::LateResources {
@@ -157,7 +157,7 @@ const APP: () = {
                     _ => ()
                 };
             }
-            c.resources.spi_eth.send_raw_packet(&eth_tx_packet).unwrap();
+            c.resources.spi_eth.send_raw_packet(&eth_tx_packet);
             iprintln!(stim0, "Packet sent");
             c.resources.delay.delay_ms(100_u32);
         }

src/lib.rs

@@ -54,9 +54,9 @@ pub struct SpiEth<SPI: Transfer<u8>,
 impl <SPI: Transfer<u8>,
       NSS: OutputPin,
       F: FnMut(u32) -> ()> SpiEth<SPI, NSS, F> {
-    pub fn new(spi: SPI, nss: NSS, f: F) -> Self {
+    pub fn new(spi: SPI, nss: NSS, delay_ns: F) -> Self {
         SpiEth {
-            spi_port: spi::SpiPort::new(spi, nss, f),
+            spi_port: spi::SpiPort::new(spi, nss, delay_ns),
             rx_buf: rx::RxBuffer::new(),
             tx_buf: tx::TxBuffer::new()
         }

src/spi.rs

@@ -1,5 +1,5 @@
 use embedded_hal::{
-    blocking::{spi::Transfer},
+    blocking::spi::Transfer,
     digital::v2::OutputPin,
 };
 
@@ -68,13 +68,13 @@ impl <SPI: Transfer<u8>,
       NSS: OutputPin,
       F: FnMut(u32) -> ()> SpiPort<SPI, NSS, F> {
     // TODO: return as Result()
-    pub fn new(spi: SPI, mut nss: NSS, f: F) -> Self {
+    pub fn new(spi: SPI, mut nss: NSS, delay_ns: F) -> Self {
         nss.set_high();
 
         SpiPort {
             spi,
             nss,
-            delay_ns: f,
+            delay_ns,
         }
     }