Bare-metal Rust on the Xilinx Zynq ZC706 devkit
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Astro ca9b10dce8 refactor regs macros for RO/WO/RW access 2019-05-07 00:32:45 +02:00
.cargo PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00
src refactor regs macros for RO/WO/RW access 2019-05-07 00:32:45 +02:00
Cargo.lock PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00
Cargo.toml PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00
build.rs PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00
default.nix PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00
link.x PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00
qemu.gdb PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00
runner.sh PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00
shell.nix PoC: boot, uart output in qemu 2019-05-05 14:56:23 +02:00