Merge branch 'mem'

This commit is contained in:
Astro 2020-02-03 00:51:09 +01:00
commit 57efbf0cec
4 changed files with 26 additions and 12 deletions

View File

@ -12,5 +12,7 @@ lto = false
[profile.release] [profile.release]
panic = "abort" panic = "abort"
debug = true debug = true
lto = true # Link-Time Optimization # Link-Time Optimization:
# turned off for producing unusable debug symbols.
lto = false
opt-level = 'z' # Optimize for size. opt-level = 'z' # Optimize for size.

View File

@ -8,7 +8,7 @@ macro_rules! def_reg_r {
impl RegisterR for $name { impl RegisterR for $name {
type R = $type; type R = $type;
#[inline(always)] #[inline]
fn read(&self) -> Self::R { fn read(&self) -> Self::R {
let mut value: u32; let mut value: u32;
unsafe { asm!($asm_instr : "=r" (value) ::: "volatile") } unsafe { asm!($asm_instr : "=r" (value) ::: "volatile") }
@ -23,12 +23,13 @@ macro_rules! def_reg_w {
impl RegisterW for $name { impl RegisterW for $name {
type W = $type; type W = $type;
#[inline(always)] #[inline]
fn write(&mut self, value: Self::W) { fn write(&mut self, value: Self::W) {
let value: u32 = value.into(); let value: u32 = value.into();
unsafe { asm!($asm_instr :: "r" (value) :: "volatile") } unsafe { asm!($asm_instr :: "r" (value) :: "volatile") }
} }
#[inline]
fn zeroed() -> Self::W { fn zeroed() -> Self::W {
0u32.into() 0u32.into()
} }
@ -43,6 +44,7 @@ macro_rules! wrap_reg {
pub inner: u32, pub inner: u32,
} }
impl From<u32> for Read { impl From<u32> for Read {
#[inline]
fn from(value: u32) -> Self { fn from(value: u32) -> Self {
Read { inner: value } Read { inner: value }
} }
@ -52,11 +54,13 @@ macro_rules! wrap_reg {
pub inner: u32, pub inner: u32,
} }
impl From<u32> for Write { impl From<u32> for Write {
#[inline]
fn from(value: u32) -> Self { fn from(value: u32) -> Self {
Write { inner: value } Write { inner: value }
} }
} }
impl Into<u32> for Write { impl Into<u32> for Write {
#[inline]
fn into(self) -> u32 { fn into(self) -> u32 {
self.inner self.inner
} }
@ -133,6 +137,7 @@ register_bit!(actlr, l1_prefetch_enable, 2);
register_bit!(actlr, fw, 0); register_bit!(actlr, fw, 0);
impl RegisterRW for ACTLR { impl RegisterRW for ACTLR {
#[inline]
fn modify<F: FnOnce(Self::R, Self::W) -> Self::W>(&mut self, f: F) { fn modify<F: FnOnce(Self::R, Self::W) -> Self::W>(&mut self, f: F) {
let r = self.read(); let r = self.read();
let w = actlr::Write { inner: r.inner }; let w = actlr::Write { inner: r.inner };

View File

@ -55,6 +55,7 @@ macro_rules! register_r {
impl libregister::RegisterR for $struct_name { impl libregister::RegisterR for $struct_name {
type R = $mod_name::Read; type R = $mod_name::Read;
#[inline]
fn read(&self) -> Self::R { fn read(&self) -> Self::R {
let inner = self.inner.read(); let inner = self.inner.read();
$mod_name::Read { inner } $mod_name::Read { inner }
@ -69,10 +70,12 @@ macro_rules! register_w {
impl libregister::RegisterW for $struct_name { impl libregister::RegisterW for $struct_name {
type W = $mod_name::Write; type W = $mod_name::Write;
#[inline]
fn zeroed() -> $mod_name::Write { fn zeroed() -> $mod_name::Write {
$mod_name::Write { inner: 0 } $mod_name::Write { inner: 0 }
} }
#[inline]
fn write(&mut self, w: Self::W) { fn write(&mut self, w: Self::W) {
unsafe { unsafe {
self.inner.write(w.inner); self.inner.write(w.inner);
@ -86,6 +89,7 @@ macro_rules! register_w {
macro_rules! register_rw { macro_rules! register_rw {
($mod_name: ident, $struct_name: ident) => ( ($mod_name: ident, $struct_name: ident) => (
impl libregister::RegisterRW for $struct_name { impl libregister::RegisterRW for $struct_name {
#[inline]
fn modify<F: FnOnce(Self::R, Self::W) -> Self::W>(&mut self, f: F) { fn modify<F: FnOnce(Self::R, Self::W) -> Self::W>(&mut self, f: F) {
unsafe { unsafe {
self.inner.modify(|inner| { self.inner.modify(|inner| {
@ -105,6 +109,7 @@ macro_rules! register_vcell {
impl libregister::RegisterR for $struct_name { impl libregister::RegisterR for $struct_name {
type R = $mod_name::Read; type R = $mod_name::Read;
#[inline]
fn read(&self) -> Self::R { fn read(&self) -> Self::R {
let inner = self.inner.get(); let inner = self.inner.get();
$mod_name::Read { inner } $mod_name::Read { inner }
@ -113,15 +118,18 @@ macro_rules! register_vcell {
impl libregister::RegisterW for $struct_name { impl libregister::RegisterW for $struct_name {
type W = $mod_name::Write; type W = $mod_name::Write;
#[inline]
fn zeroed() -> $mod_name::Write { fn zeroed() -> $mod_name::Write {
$mod_name::Write { inner: 0 } $mod_name::Write { inner: 0 }
} }
#[inline]
fn write(&mut self, w: Self::W) { fn write(&mut self, w: Self::W) {
self.inner.set(w.inner); self.inner.set(w.inner);
} }
} }
impl libregister::RegisterRW for $struct_name { impl libregister::RegisterRW for $struct_name {
#[inline]
fn modify<F: FnOnce(Self::R, Self::W) -> Self::W>(&mut self, f: F) { fn modify<F: FnOnce(Self::R, Self::W) -> Self::W>(&mut self, f: F) {
let r = self.read(); let r = self.read();
let w = $mod_name::Write { inner: r.inner }; let w = $mod_name::Write { inner: r.inner };
@ -169,6 +177,7 @@ macro_rules! register_bit {
$(#[$outer])* $(#[$outer])*
impl $mod_name::Read { impl $mod_name::Read {
#[allow(unused)] #[allow(unused)]
#[inline]
pub fn $name(&self) -> bool { pub fn $name(&self) -> bool {
use bit_field::BitField; use bit_field::BitField;
@ -179,6 +188,7 @@ macro_rules! register_bit {
$(#[$outer])* $(#[$outer])*
impl $mod_name::Write { impl $mod_name::Write {
#[allow(unused)] #[allow(unused)]
#[inline]
pub fn $name(mut self, value: bool) -> Self { pub fn $name(mut self, value: bool) -> Self {
use bit_field::BitField; use bit_field::BitField;
@ -195,6 +205,7 @@ macro_rules! register_bits {
($mod_name: ident, $(#[$outer:meta])* $name: ident, $type: ty, $bit_begin: expr, $bit_end: expr) => ( ($mod_name: ident, $(#[$outer:meta])* $name: ident, $type: ty, $bit_begin: expr, $bit_end: expr) => (
impl $mod_name::Read { impl $mod_name::Read {
#[allow(unused)] #[allow(unused)]
#[inline]
$(#[$outer])* $(#[$outer])*
pub fn $name(&self) -> $type { pub fn $name(&self) -> $type {
use bit_field::BitField; use bit_field::BitField;
@ -207,6 +218,7 @@ macro_rules! register_bits {
$(#[$outer])* $(#[$outer])*
impl $mod_name::Write { impl $mod_name::Write {
#[allow(unused)] #[allow(unused)]
#[inline]
pub fn $name(mut self, value: $type) -> Self { pub fn $name(mut self, value: $type) -> Self {
use bit_field::BitField; use bit_field::BitField;
@ -226,6 +238,7 @@ macro_rules! register_bits_typed {
($mod_name: ident, $(#[$outer:meta])* $name: ident, $bit_type: ty, $type: ty, $bit_begin: expr, $bit_end: expr) => ( ($mod_name: ident, $(#[$outer:meta])* $name: ident, $bit_type: ty, $type: ty, $bit_begin: expr, $bit_end: expr) => (
impl $mod_name::Read { impl $mod_name::Read {
#[allow(unused)] #[allow(unused)]
#[inline]
$(#[$outer])* $(#[$outer])*
pub fn $name(&self) -> $type { pub fn $name(&self) -> $type {
use bit_field::BitField; use bit_field::BitField;
@ -237,6 +250,7 @@ macro_rules! register_bits_typed {
impl $mod_name::Write { impl $mod_name::Write {
#[allow(unused)] #[allow(unused)]
#[inline]
$(#[$outer])* $(#[$outer])*
pub fn $name(mut self, value: $type) -> Self { pub fn $name(mut self, value: $type) -> Self {
use bit_field::BitField; use bit_field::BitField;
@ -254,6 +268,7 @@ macro_rules! register_at {
($name: ident, $addr: expr, $ctor: ident) => ( ($name: ident, $addr: expr, $ctor: ident) => (
impl $name { impl $name {
#[allow(unused)] #[allow(unused)]
#[inline]
pub fn $ctor() -> &'static mut Self { pub fn $ctor() -> &'static mut Self {
let addr = $addr as *mut Self; let addr = $addr as *mut Self;
unsafe { &mut *addr } unsafe { &mut *addr }

10
link.x
View File

@ -21,17 +21,9 @@ MEMORY
SECTIONS SECTIONS
{ {
.exceptions ORIGIN(OCM) : .text :
{ {
KEEP(*(.text.exceptions)); KEEP(*(.text.exceptions));
} > OCM
.__fill (NOLOAD) : {
. = ORIGIN(OCM) + 0x8000;
} > OCM
.text (ORIGIN(OCM) + 0x8000) :
{
*(.text.boot); *(.text.boot);
*(.text .text.*); *(.text .text.*);
} > OCM } > OCM