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551 Commits

Author SHA1 Message Date
Sebastien Bourdeauducq 1695076baf shell.nix: add artiq-netboot 2020-10-15 16:16:53 +08:00
Sebastien Bourdeauducq b7155c9ded Makefile: cleanup 2020-10-14 13:06:15 +08:00
Sebastien Bourdeauducq 7f75dbd87e nix: fix cargoSha256 issues 2020-10-13 23:42:30 +08:00
Sebastien Bourdeauducq 5c62d6a141 update dependencies, disable custom compiler_builtins (#113) 2020-10-13 21:51:40 +08:00
Sebastien Bourdeauducq 74a453b3a5 README: nixpkgs 20.09 2020-10-13 19:19:10 +08:00
Sebastien Bourdeauducq eab839aed0 follow changes in zynq-rs 2020-10-13 19:12:55 +08:00
Sebastien Bourdeauducq dffe00990b device_db: add DDS channels 
Used by some tests.
 2020-09-11 11:22:06 +08:00
pca006132 a374d8a02f runtime/kernel/dma: reduced replay overhead 
We can just flush the cache once when we get the handle, instead of
everytime before replay.
 2020-09-09 21:25:03 +08:00
pca006132 03d9827a5a acpki: working 2020-09-09 21:24:49 +08:00
Sebastien Bourdeauducq 01093f02cf default.nix: expose zynq-rs 2020-09-09 19:22:08 +08:00
Sebastien Bourdeauducq 86b9045417 use liconfig, libcoreio, szl from zynq-rs 2020-09-09 18:44:12 +08:00
Sebastien Bourdeauducq 7e26a87aed fix previous commit 2020-09-09 18:12:39 +08:00
Sebastien Bourdeauducq a277e89b3a Makefile: fix runtime.bin target 2020-09-09 17:01:14 +08:00
Sebastien Bourdeauducq a99ee3ec32 use Nix files from zynq-rs 2020-09-09 16:58:37 +08:00
Sebastien Bourdeauducq c3f9a76f2a use openocd files from zynq-rs 2020-09-09 15:44:29 +08:00
Sebastien Bourdeauducq 4dfd82f6ec nix: pin mozilla overlay 2020-09-09 15:19:43 +08:00
Sebastien Bourdeauducq 8bb1727e64 openocd: remove cable file for built-in ZC706 JTAG 
This typically crappy JTAG adapter just doesn't work.
 2020-09-09 14:51:21 +08:00
pca006132 1e742cc390 updated zynq-rs dependency 2020-09-07 16:18:50 +08:00
Sebastien Bourdeauducq 2fe73505c8 improve i2c error reporting 2020-09-06 00:38:28 +08:00
Sebastien Bourdeauducq 36d8ffec3b expose i2c to kernels 2020-09-06 00:11:19 +08:00
Sebastien Bourdeauducq 91ed035bef makefile: fix szl rebuild (#108) 2020-09-06 00:10:44 +08:00
pca006132 d5a91a7697 updated zynq-rs for more CPU options 2020-09-04 16:43:07 +08:00
pca006132 5da76f2abb enabled cpu program flow prediction 2020-09-04 13:25:17 +08:00
pca006132 5e4bf8bbf7 runtime/comms: Faster RPC alloc 
We do busy polling for some time before doing await, for small
allocations we could avoid the context switching and reduce the latency.
 2020-09-03 16:58:44 +08:00
pca006132 cdc8ad8aee runtime/kernel/control: fixed memory leak 2020-09-03 16:51:51 +08:00
pca006132 1931957bc0 Updated cargoSha256 2020-09-02 10:15:52 +08:00
pca006132 805f1d4eff runtime: increased heap size 2020-09-02 10:15:52 +08:00
pca006132 ae07c05db4 runtime: optimize for speed and fix deadlock 
The previous method of taking the channel could cause deadlock, we now
use semaphore to signal if the channel is available instead of busy
polling the mutex.
 2020-09-02 10:15:52 +08:00
Sebastien Bourdeauducq fc285fcd13 remote_run: fix pure mode 2020-09-01 17:27:29 +08:00
Sebastien Bourdeauducq b0706f470d runtime: set default log level to Info 2020-09-01 17:11:21 +08:00
pca006132 6ede148810 Updated build scripts 2020-09-01 15:57:20 +08:00
pca006132 ccf8ae5b5d szl: implemented #96 
SZL no longer do self-extraction for runtime binary, it would boot from
SD/ethernet depending on the boot mode settings.
This allows a larger runtime binary, so we can optimize for speed in the
runtime firmware for better performance, and allow more features to be
added later.
 2020-09-01 15:57:20 +08:00
pca006132 653d143784 updated cargoSha256 2020-09-01 15:49:46 +08:00
pca006132 050b2457a4 runtime/main: removed bitstream loading code 2020-09-01 15:43:54 +08:00
pca006132 eb78e4e2da libconfig: refactored load_pl into bootgen 
Now allows loading firmware.
 2020-09-01 14:48:19 +08:00
pca006132 afecc83ecf libconfig/net_settings: made ipv6 optional feature 
This is to prepare for szl, which cannot use ipv6 due to memory
limitation.
 2020-09-01 14:48:19 +08:00
pca006132 04437e876c libconfig/load_pl: added alignment for devc buffer 
According to the TRM, the buffer should be 64B aligned.
Without the alignment would cause failure for the DMA transaction.
It seems that the allocator would give some alignment, but to be more
correct we should specify that with the alloc interface.
 2020-09-01 14:48:19 +08:00
pca006132 42f94487cf split config code into libconfig 2020-09-01 14:48:09 +08:00
pca006132 d474cf58a5 runtime/rpc: optimizations for list and arrays 
Requires https://github.com/m-labs/artiq/pull/1510
This is the commit producing the result in the table.
 2020-08-26 13:47:41 +08:00
pca006132 71427f8ec8 runtime/proto_async: simplify functions 
And the compiler can use its intrinsic for byte rev.
 2020-08-26 13:46:51 +08:00
Sebastien Bourdeauducq d6ab23de1f xbuild -> cargo-xbuild 2020-08-25 17:39:42 +08:00
Sebastien Bourdeauducq 949adbd90a cargo-xbuild: cleanup 2020-08-25 16:59:57 +08:00
Sebastien Bourdeauducq 49689dedf1 update cargosha256 2020-08-25 16:25:27 +08:00
Sebastien Bourdeauducq 538c012bc4 use new repos location for compiler-builtins-zynq 2020-08-25 16:24:30 +08:00
pca006132 ba162b3997 Fix pure build 2020-08-25 14:51:39 +08:00
pca006132 321a8e1522 runtime/kernel/core1: reset rtio after interrupted 2020-08-25 14:51:39 +08:00
pca006132 0fb278f7cb runtime/kernel/core1: allows getting backtrace when kernel is not loaded 2020-08-25 14:51:39 +08:00
pca006132 fa187fb37a runtime/kernel: use mutable static for shared channel 
Mutex would prevent restart if we failed while waiting for RPC.
 2020-08-25 14:51:39 +08:00
pca006132 e592efb2b8 enabled L2 cache and optimized ethernet 2020-08-25 14:51:39 +08:00
Sebastien Bourdeauducq 2faf74f708 Revert "drop FSBL" 
Gitea issue #94

This reverts commit 67ff3c36e2.
 2020-08-25 10:49:00 +08:00