kernel: flush now write-buffered dcache of image before execution

core0-buffer
Astro 2020-06-18 20:14:02 +02:00
parent 06ad8dfe27
commit d9bd42389f
3 changed files with 7 additions and 3 deletions

View File

@ -23,7 +23,7 @@ pub struct DynamicSection {
/// target memory image /// target memory image
pub struct Image { pub struct Image {
layout: Layout, layout: Layout,
data: &'static mut [u8], pub data: &'static mut [u8],
} }
impl Image { impl Image {

View File

@ -58,7 +58,7 @@ fn elf_hash(name: &[u8]) -> u32 {
} }
pub struct Library { pub struct Library {
image: Image, pub image: Image,
dyn_section: DynamicSection, dyn_section: DynamicSection,
} }

View File

@ -3,7 +3,7 @@ use log::{debug, error};
use alloc::{vec::Vec, sync::Arc}; use alloc::{vec::Vec, sync::Arc};
use cslice::CSlice; use cslice::CSlice;
use libcortex_a9::{mutex::Mutex, sync_channel::{self, sync_channel}}; use libcortex_a9::{cache::dcci_slice, mutex::Mutex, sync_channel::{self, sync_channel}};
use libsupport_zynq::boot::Core1; use libsupport_zynq::boot::Core1;
use dyld; use dyld;
@ -313,6 +313,10 @@ pub fn main_core1() {
current_modinit = Some(__modinit__); current_modinit = Some(__modinit__);
current_typeinfo = library.lookup(b"typeinfo"); current_typeinfo = library.lookup(b"typeinfo");
debug!("kernel loaded"); debug!("kernel loaded");
// Flush data cache entries for the image in DDR, including
// Memory/Instruction Symchronization Barriers
dcci_slice(library.image.data);
core1_tx.send(Message::LoadCompleted); core1_tx.send(Message::LoadCompleted);
}, },
Err(error) => { Err(error) => {