forked from M-Labs/artiq-zynq
use fpu_enable from zc706
This commit is contained in:
parent
de8da59e56
commit
3bd4643009
@ -15,7 +15,7 @@ let
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version = "0.1.0";
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version = "0.1.0";
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src = ./src;
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src = ./src;
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cargoSha256 = "0p7n0kng0l3cgvfb6lss2pnljawh2gy7j1kvd9k072zyaqqjm58l";
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cargoSha256 = "04f45x75vb2ccn8h5pclng913747jx3qqv5d7fip5dhqw90nb8gn";
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nativeBuildInputs = [
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nativeBuildInputs = [
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pkgs.gnumake
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pkgs.gnumake
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14
src/Cargo.lock
generated
14
src/Cargo.lock
generated
@ -37,9 +37,9 @@ checksum = "08c48aae112d48ed9f069b33538ea9e3e90aa263cfa3d1c24309612b1f7472de"
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[[package]]
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[[package]]
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name = "cc"
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name = "cc"
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version = "1.0.54"
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version = "1.0.57"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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checksum = "7bbb73db36c1246e9034e307d0fba23f9a2e251faa47ade70c1bd252220c8311"
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checksum = "0fde55d2a2bfaa4c9668bbc63f531fbdeee3ffe188f4662511ce2c22b3eedebe"
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[[package]]
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[[package]]
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name = "cfg-if"
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name = "cfg-if"
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@ -200,7 +200,7 @@ dependencies = [
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[[package]]
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[[package]]
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name = "libasync"
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name = "libasync"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#6195ad40c334a847cd01cd4adadf6b8f8d730908"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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dependencies = [
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dependencies = [
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"embedded-hal",
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"embedded-hal",
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"libcortex_a9",
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"libcortex_a9",
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@ -212,7 +212,7 @@ dependencies = [
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[[package]]
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[[package]]
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name = "libboard_zynq"
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name = "libboard_zynq"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#6195ad40c334a847cd01cd4adadf6b8f8d730908"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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dependencies = [
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dependencies = [
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"bit_field",
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"bit_field",
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"embedded-hal",
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"embedded-hal",
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@ -236,7 +236,7 @@ dependencies = [
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[[package]]
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[[package]]
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name = "libcortex_a9"
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name = "libcortex_a9"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#6195ad40c334a847cd01cd4adadf6b8f8d730908"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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dependencies = [
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dependencies = [
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"bit_field",
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"bit_field",
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"libregister",
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"libregister",
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@ -245,7 +245,7 @@ dependencies = [
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[[package]]
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[[package]]
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name = "libregister"
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name = "libregister"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#6195ad40c334a847cd01cd4adadf6b8f8d730908"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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dependencies = [
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dependencies = [
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"bit_field",
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"bit_field",
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"vcell",
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"vcell",
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@ -255,7 +255,7 @@ dependencies = [
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[[package]]
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[[package]]
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name = "libsupport_zynq"
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name = "libsupport_zynq"
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version = "0.0.0"
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version = "0.0.0"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#6195ad40c334a847cd01cd4adadf6b8f8d730908"
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source = "git+https://git.m-labs.hk/M-Labs/zc706.git#90e33f688ab8de54173caca1e8d9a7357def5df8"
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dependencies = [
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dependencies = [
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"compiler_builtins",
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"compiler_builtins",
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"libboard_zynq",
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"libboard_zynq",
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@ -3,7 +3,7 @@ use log::{debug, info, error};
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use alloc::{vec::Vec, sync::Arc};
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use alloc::{vec::Vec, sync::Arc};
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use cslice::CSlice;
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use cslice::CSlice;
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use libcortex_a9::{cache::dcci_slice, mutex::Mutex, sync_channel::{self, sync_channel}};
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use libcortex_a9::{enable_fpu, cache::dcci_slice, mutex::Mutex, sync_channel::{self, sync_channel}};
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use libsupport_zynq::boot::Core1;
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use libsupport_zynq::boot::Core1;
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use dyld;
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use dyld;
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@ -288,17 +288,7 @@ fn resolve(required: &[u8]) -> Option<u32> {
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pub fn main_core1() {
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pub fn main_core1() {
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debug!("Core1 started");
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debug!("Core1 started");
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unsafe {
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enable_fpu();
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llvm_asm!("
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mrc p15, 0, r1, c1, c0, 2
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orr r1, r1, (0b1111<<20)
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mcr p15, 0, r1, c1, c0, 2
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vmrs r1, fpexc
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orr r1, r1, (1<<30)
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vmsr fpexc, r1
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":::"r1");
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}
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debug!("FPU enabled on Core1");
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debug!("FPU enabled on Core1");
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let mut core1_tx = None;
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let mut core1_tx = None;
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@ -1,7 +1,6 @@
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#![no_std]
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#![no_std]
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#![no_main]
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#![no_main]
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#![recursion_limit="1024"] // for futures_util::select!
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#![recursion_limit="1024"] // for futures_util::select!
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#![feature(llvm_asm)]
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#![feature(alloc_error_handler)]
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#![feature(alloc_error_handler)]
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#![feature(panic_info_message)]
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#![feature(panic_info_message)]
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@ -1,14 +1,13 @@
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#![no_std]
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#![no_std]
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#![no_main]
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#![no_main]
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#![feature(llvm_asm)]
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extern crate log;
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extern crate log;
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use core::mem;
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use core::mem;
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use log::{info, error};
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use log::{debug, info, error};
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use cstr_core::CStr;
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use cstr_core::CStr;
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use libcortex_a9::cache::dcci_slice;
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use libcortex_a9::{enable_fpu, cache::dcci_slice};
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use libboard_zynq::{
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use libboard_zynq::{
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self as zynq, clocks::Clocks, clocks::source::{ClockSource, ArmPll, IoPll},
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self as zynq, clocks::Clocks, clocks::source::{ClockSource, ArmPll, IoPll},
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logger,
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logger,
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@ -37,18 +36,9 @@ pub fn main_core0() {
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log::set_max_level(log::LevelFilter::Debug);
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log::set_max_level(log::LevelFilter::Debug);
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info!("Simple Zynq Loader starting...");
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info!("Simple Zynq Loader starting...");
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unsafe {
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enable_fpu();
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llvm_asm!("
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debug!("FPU enabled on Core0");
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mrc p15, 0, r1, c1, c0, 2
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orr r1, r1, (0b1111<<20)
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mcr p15, 0, r1, c1, c0, 2
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vmrs r1, fpexc
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orr r1, r1, (1<<30)
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vmsr fpexc, r1
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":::"r1");
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}
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info!("FPU enabled on Core0");
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const CPU_FREQ: u32 = 800_000_000;
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const CPU_FREQ: u32 = 800_000_000;
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ArmPll::setup(2 * CPU_FREQ);
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ArmPll::setup(2 * CPU_FREQ);
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