forked from sinara-hw/datasheets
occheung
ac8d398f5e
For consistency with other DDS examples that uses multiple channels. e.g. TTL relay external trigger, DDS synchronization
36 lines
1.2 KiB
Python
36 lines
1.2 KiB
Python
from artiq.experiment import *
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from scipy import signal
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import numpy
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class SUServoExample(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.suservo = self.get_device("suservo0")
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self.suschannel0 = self.get_device("suservo0_ch0")
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@kernel
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def run(self):
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self.core.reset()
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self.core.break_realtime()
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self.suservo.init()
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self.suservo.set_pgia_mu(0, 0) # unity gain
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self.suservo.cplds[0].set_att(0, 15.)
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self.suschannel0.set_y(profile=0, y=0.) # Clear integrator
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self.suschannel0.set_iir(
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profile=0,
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adc=0, # take data from Sampler channel 0
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kp=-1., # -1 P gain
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ki=0./s, # no integrator gain
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g=0., # no integrator gain limit
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delay=0. # no IIR update delay after enabling
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)
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self.suschannel0.set_dds(
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profile=0,
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offset=-.3, # 3 V with above PGIA settings
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frequency=10*MHz,
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phase=0.)
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# enable RF, IIR updates and set profile
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self.suschannel0.set(en_out=1, en_iir=1, profile=0)
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self.suservo.set_config(enable=1)
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