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\documentclass [10pt] { datasheet}
\usepackage { palatino}
\usepackage { textgreek}
\usepackage { minted}
\usepackage { tcolorbox}
\usepackage { etoolbox}
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\usepackage [justification=centering] { caption}
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\usepackage [utf8] { inputenc}
\usepackage [english] { babel}
\usepackage [english] { isodate}
\usepackage { graphicx}
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\usepackage { subfig}
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\usepackage { tikz}
\usepackage { pgfplots}
\usepackage { circuitikz}
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\usepackage { pifont}
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\usetikzlibrary { calc}
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\usetikzlibrary { fit,backgrounds}
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\title { 2118 BNC-TTL / 2128 SMA-TTL}
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\author { M-Labs Limited}
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\date { January 2022}
\revision { Revision 2}
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\companylogo { \includegraphics [height=0.73in] { artiq_ sinara.pdf} }
\begin { document}
\maketitle
\section { Features}
\begin { itemize}
\item { 8 channels.}
\item { Input and output capable.}
\item { Galvanically isolated.}
\item { 3ns minimum pulse width.}
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\item { BNC or SMA connectors.}
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\end { itemize}
\section { Applications}
\begin { itemize}
\item { Photon counting.}
\item { External equipment trigger.}
\item { Optical shutter control.}
\end { itemize}
\section { General Description}
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The 2118 BNC-TTL card is a 8hp EEM module, while the 2128 SMA-TTL card is a 4hp EEM module.
Both TTL cards add general-purpose digital I/O capabilities to carrier cards such as 1124 Kasli and 1125 Kasli-SoC.
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Each card provides two banks of four digital channels each, with BNC (2118) or SMA (2128) connectors.
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Each bank has individual ground isolation.
The direction (input or output) of each bank can be selected using DIP switches.
Each channel supports 50\textOmega ~terminations individually controllable using DIP switches.
Outputs tolerate short circuits indefinitely.
The card support a minimum pulse width of 3ns.
% Switch to next column
\vfill \break
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\newcommand * { \MyLabel } [3][2cm]{ \parbox { #1} { \centering #2 \\ #3} }
\newcommand * { \MymyLabel } [3][4cm]{ \parbox { #1} { \centering #2 \\ #3} }
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\newcommand { \repeatfootnote } [1]{ \textsuperscript { \ref { #1} } }
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\newcommand { \inputcolorboxminted } [2]{ %
\begin { tcolorbox} [colback=white]
\inputminted [#1, gobble=4] { python} { #2}
\end { tcolorbox}
}
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\begin { figure} [h]
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\centering
\scalebox { 0.88} {
\begin { circuitikz} [european, scale=0.95, every label/.append style={ align=center} ]
\begin { scope} [yshift=1.3cm]
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\draw [color=white, text=black] (-0.1,0) node[twoportshape,t={ IO 0} , circuitikz/bipoles/twoport/width=1.2, scale=0.4] (io0) { } ;
\draw [color=white, text=black] (-0.1,-0.7) node[twoportshape,t={ IO 1} , circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io1) { } ;
\draw [color=white, text=black] (-0.1,-1.4) node[twoportshape,t={ IO 2} , circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io2) { } ;
\draw [color=white, text=black] (-0.1,-2.1) node[twoportshape,t={ IO 3} , circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io3) { } ;
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\node [label={ [xshift=-0.18cm, yshift=-0.305cm]\tiny { IO 0} } ] { } ;
\node [label={ [xshift=-0.18cm, yshift=-0.97cm]\tiny { IO 1} } ] { } ;
\node [label={ [xshift=-0.18cm, yshift=-1.64cm]\tiny { IO 2} } ] { } ;
\node [label={ [xshift=-0.18cm, yshift=-2.302cm]\tiny { IO 3} } ] { } ;
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% draw female SMA_0,1,2,3
\begin { scope} [scale=0.07 , rotate=-90, xshift=0cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end { scope}
\begin { scope} [scale=0.07 , rotate=-90, xshift=10cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end { scope}
\begin { scope} [scale=0.07 , rotate=-90, xshift=20cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end { scope}
\begin { scope} [scale=0.07 , rotate=-90, xshift=30cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end { scope}
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\draw (1.6,-1.05) node[twoportshape,t={ IO Bus Transceiver} , circuitikz/bipoles/twoport/width=2.5, scale=0.7, rotate=-90 ] (bus1) { } ;
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\draw (3.05,-0) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso1) { } ;
\draw (3.05,-0.7) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso2) { } ;
\draw (3.05,-1.4) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso3) { } ;
\draw (3.05,-2.1) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso4) { } ;
\draw (3.05,-2.7) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (i2ciso1) { } ;
\draw (4.5,-1.15) node[twoportshape,t=\MymyLabel { 4-Channel LVDS} { Line Transceiver} , circuitikz/bipoles/twoport/width=2.6, scale=0.7, rotate=-90] (lvds1) { } ;
\draw (6.8,-0.9) -- ++(0.00001,0) node[twoportshape, anchor=left, t={ EEM port} , circuitikz/bipoles/twoport/width=6, scale=0.6, rotate=-90] (kasli) { } ;
\draw (0.8,-3.5) node[twoportshape,t=\MymyLabel { Per-bank \phantom { spac} } { Input/Output Switch} , circuitikz/bipoles/twoport/width=2.7, scale=0.44] (ioswitch) { } ;
\draw (3.05,-3.5) node[twoportshape,t=\MymyLabel { IO Expander} { for I2C Bus} , circuitikz/bipoles/twoport/width=1.8, scale=0.5] (i2c) { } ;
\draw (5.68,-2.3) node[twoportshape,t=EEPROM, circuitikz/bipoles/twoport/width=1.2, scale=0.5] (eeprom) { } ;
\draw (0.8,-2.7) node[twoportshape,t=\MymyLabel { High-Z/50\textOmega } { Switch \phantom { ssssss} } , circuitikz/bipoles/twoport/width=2, scale=0.4] (termswitch1) { } ;
% Termination Switch 1,2,3,4
\begin { scope} [xshift=0.9cm, yshift=-2.66cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
\begin { scope} [xshift=1cm, yshift=-2.66cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
\begin { scope} [xshift=1.1cm, yshift=-2.66cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
\begin { scope} [xshift=1.2cm, yshift=-2.66cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
\end { scope}
% I/O Switch 1, 2
\begin { scope} [xshift=1.2cm, yshift=-1.98cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
\begin { scope} [xshift=1.32cm, yshift=-1.98cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
\draw (0.8,-3.05) node[twoportshape,t=\MymyLabel { High-Z/50\textOmega } { Switch \phantom { ssssss} } , circuitikz/bipoles/twoport/width=2, scale=0.4] (termswitch2) { } ;
% Termination Switch 5,6,7,8
\begin { scope} [xshift=0.9cm, yshift=-3.02cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
\begin { scope} [xshift=1cm, yshift=-3.02cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
\begin { scope} [xshift=1.1cm, yshift=-3.02cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
\begin { scope} [xshift=1.2cm, yshift=-3.02cm, scale=0.12, every node/.style={ scale=0.1} , rotate=-90 ]
\draw (0.4,0) to[short,-o](0.75,0);
\draw (0.78,0)-- +(30:0.46);
\draw (1.25,0)to[short,o-](1.6,0) ;
\end { scope}
% channel 5,6,7,8
\begin { scope} [yshift=-3.6cm]
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\draw [color=white, text=black] (-0.1,0) node[twoportshape,t={ IO 4} , circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io4) { } ;
\draw [color=white, text=black] (-0.1,-0.7) node[twoportshape,t={ IO 5} , circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io5) { } ;
\draw [color=white, text=black] (-0.1,-1.4) node[twoportshape,t={ IO 6} , circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io6) { } ;
\draw [color=white, text=black] (-0.1,-2.1) node[twoportshape,t={ IO 7} , circuitikz/bipoles/twoport/width=1.2, scale=0.4 ] (io7) { } ;
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\node [label={ [xshift=-0.18cm, yshift=-0.305cm]\tiny { IO 4} } ] { } ;
\node [label={ [xshift=-0.18cm, yshift=-0.97cm]\tiny { IO 5} } ] { } ;
\node [label={ [xshift=-0.18cm, yshift=-1.64cm]\tiny { IO 6} } ] { } ;
\node [label={ [xshift=-0.18cm, yshift=-2.302cm]\tiny { IO 7} } ] { } ;
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% draw female SMA 4,5,6,7
\begin { scope} [scale=0.07 , rotate=-90, xshift=0cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end { scope}
\begin { scope} [scale=0.07 , rotate=-90, xshift=10cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end { scope}
\begin { scope} [scale=0.07 , rotate=-90, xshift=20cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end { scope}
\begin { scope} [scale=0.07 , rotate=-90, xshift=30cm, yshift=2cm]
\draw (0,0.65) -- (0,3);
\clip (-1.5,0) rectangle (1.5,1.5);
\draw (0,0) circle(1.5);
\clip (-0.8,0) rectangle (0.8,0.8);
\draw (0,0) circle(0.8);
\end { scope}
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\draw (1.6,-1.05) node[twoportshape,t={ IO Bus Transceiver} , circuitikz/bipoles/twoport/width=2.5, scale=0.7, rotate=-90 ] (bus2) { } ;
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\draw (3.05,-0) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso5) { } ;
\draw (3.05,-0.7) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso6) { } ;
\draw (3.05,-1.4) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso7) { } ;
\draw (3.05,-2.1) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (iso8) { } ;
\draw (3.05,0.6) node[twoportshape,t={ Isolator} , circuitikz/bipoles/twoport/width=1.3, scale=0.4] (i2ciso2) { } ;
\draw (4.5,-1.05) node[twoportshape,t=\MymyLabel { 4-Channel LVDS} { Line Transceiver} , circuitikz/bipoles/twoport/width=2.6, scale=0.7, rotate=-90] (lvds2) { } ;
\end { scope}
% Drawing Connections
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\draw [latexslim-latexslim] (io0.east) -- ++(1,0);
\draw [latexslim-latexslim] (io1.east) -- ++(1,0);
\draw [latexslim-latexslim] (io2.east) -- ++(1,0);
\draw [latexslim-latexslim] (io3.east) -- ++(1,0);
\draw [latexslim-latexslim] (io4.east) -- ++(1,0);
\draw [latexslim-latexslim] (io5.east) -- ++(1,0);
\draw [latexslim-latexslim] (io6.east) -- ++(1,0);
\draw [latexslim-latexslim] (io7.east) -- ++(1,0);
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\draw [latexslim-latexslim] (iso1.west) -- ++(-0.72,0) ;
\draw [latexslim-latexslim] (iso2.west) -- ++(-0.72,0) ;
\draw [latexslim-latexslim] (iso3.west) -- ++(-0.72,0) ;
\draw [latexslim-latexslim] (iso4.west) -- ++(-0.72,0) ;
\draw [latexslim-latexslim] (iso1.east) -- ++(0.69,0);
\draw [latexslim-latexslim] (iso2.east) -- ++(0.69,0);
\draw [latexslim-latexslim] (iso3.east) -- ++(0.69,0);
\draw [latexslim-latexslim] (iso4.east) -- ++(0.69,0);
\draw [latexslim-latexslim] (iso5.west) -- ++(-0.72,0) ;
\draw [latexslim-latexslim] (iso6.west) -- ++(-0.72,0) ;
\draw [latexslim-latexslim] (iso7.west) -- ++(-0.72,0) ;
\draw [latexslim-latexslim] (iso8.west) -- ++(-0.72,0) ;
\draw [latexslim-latexslim] (iso5.east) -- ++(0.7,0);
\draw [latexslim-latexslim] (iso6.east) -- ++(0.7,0);
\draw [latexslim-latexslim] (iso7.east) -- ++(0.7,0);
\draw [latexslim-latexslim] (iso8.east) -- ++(0.7,0);
\draw [latexslim-] (eeprom.south) -- ++(0,-0.95);
\draw [latexslim-latexslim] (lvds1.north) -- ++(1.61,0);
\draw [latexslim-latexslim] (lvds2.north) -- ++(1.62,0);
\draw [latexslim-latexslim] (i2c.east) -- ++(2.77,0);
\draw [latexslim-] (i2c.west) -- (ioswitch.east) ;
\draw [-latexslim] (i2c.north east) -- (lvds1.south east);
\draw [-latexslim] (i2c.south east) -- (lvds2.south west);
\draw [-latexslim] (i2ciso1.west) -- (bus1.north east);
\draw [thin] [-latexslim] (i2c.north) -- (i2ciso1.south);
\draw [-latexslim] (i2ciso2.west) -- (bus2.north west);
\draw [thin] [-latexslim] (i2c.south) -- (i2ciso2.north);
% termination switch connection
\draw (0.65,-1.18) -- ++(0,2.47) ;
\draw (0.75,-1.18) -- ++(0,1.77) ;
\draw (0.85,-1.18) -- ++(0,1.07) ;
\draw (0.95,-1.18) -- ++(0,0.37) ;
\draw (0.65,-3.25) -- ++(0,-2.45) ;
\draw (0.75,-3.25) -- ++(0,-1.75) ;
\draw (0.85,-3.25) -- ++(0,-1.05) ;
\draw (0.95,-3.25) -- ++(0,-0.35) ;
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\node [draw, dotted, thick, rounded corners, inner xsep=0.7em, inner ysep=0.4em, fit=(io0) (i2ciso1.south west)] (box1) { } ;
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\node [fill=white, rotate=-90] at (box1.west) { GND BANK 1} ;
\node [fill=white,above] at (box1.north) { \tiny { Either all 4 channels are inputs or all 4 channels are outputs } } ;
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\node [draw, dotted, thick, rounded corners, inner xsep=0.7em, inner ysep=0.4em, fit=(io4)(termswitch2) (iso8.south west)] (box2) { } ;
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\node [fill=white, rotate=-90] at (box2.west) { GND BANK 2} ;
\node [fill=white,below] at (box2.south) { \tiny { Either all 4 channels are inputs or all 4 channels are outputs } } ;
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\end { circuitikz}
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}
\caption { Simplified Block Diagram}
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\end { figure}
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\begin { figure} [hbt!]
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\centering
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\subfloat [\centering BNC-TTL] { {
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\includegraphics [height=1.8in] { DIO_ BNC_ FP.jpg}
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\includegraphics [height=1.8in] { photo2118.jpg}
} } %
\subfloat [\centering SMA-TTL] { {
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\includegraphics [height=1.8in] { DIO_ SMA_ FP.jpg}
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\includegraphics [height=1.8in] { photo2128.jpg}
} } %
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\caption { BNC-TTL/SMA-TTL Card photos} %
\label { fig:example} %
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\end { figure}
% For wide tables, a single column layout is better. It can be switched
% page-by-page.
\onecolumn
\section { Electrical Specifications}
All specifications are in $ 0 \degree C \leq T _ A \leq 70 \degree C $ unless otherwise noted.
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Specifications are based on the bus transceivers IC (SN74BCT25245DW\footnote { \label { transceiver} https://www.ti.com/lit/ds/symlink/sn74bct25245.pdf} )
and the isolator IC (SI8651BB-B-IS1\footnote { \label { isolator} https://www.skyworksinc.com/-/media/Skyworks/SL/documents/public/data-sheets/si865x-datasheet.pdf} ).
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The typical value of minimum pulse width is based on test results\footnote { \label { sinara187} https://github.com/sinara-hw/sinara/issues/187} .
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\begin { table} [h]
\begin { threeparttable}
\caption { Recommended Operating Conditions}
\begin { tabularx} { \textwidth } { l | c | c c c | c | X}
\thickhline
\textbf { Parameter} & \textbf { Symbol} & \textbf { Min.} & \textbf { Typ.} & \textbf { Max.} &
\textbf { Unit} & \textbf { Conditions} \\
\hline
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High-level input voltage\repeatfootnote { transceiver} & $ V _ { IH } $ & 2 & & 5.5 & V & termination disabled \\
& & 2 & & 5 & V & termination enabled \\
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\hline
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Low-level input voltage\repeatfootnote { transceiver} & $ V _ { IL } $ & -0.5 & & 0.8 & V & \\
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\hline
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Input clamp current\repeatfootnote { transceiver} & $ I _ { OH } $ & & & -18 & mA & termination disabled \\
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\hline
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High-level output current\repeatfootnote { transceiver} & $ I _ { OH } $ & & & -160 & mA & \\
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\hline
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Low-level output current\repeatfootnote { transceiver} & $ I _ { OL } $ & & & 376 & mA & \\
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\thickhline
\end { tabularx}
\end { threeparttable}
\end { table}
\begin { table} [h]
\begin { threeparttable}
\caption { Electrical Characteristics}
\begin { tabularx} { \textwidth } { l | c | c c c | c | X}
\thickhline
\textbf { Parameter} & \textbf { Symbol} & \textbf { Min.} & \textbf { Typ.} & \textbf { Max.} &
\textbf { Unit} & \textbf { Conditions} \\
\hline
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High-level output voltage\repeatfootnote { transceiver} & $ V _ { OH } $ & 2 & & & V & $ I _ { OH } $ =-160mA \\
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& & 2.7 & & & V & $ I _ { OH } $ =-6mA \\
\hline
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Low-level output voltage\repeatfootnote { transceiver} & $ V _ { OL } $ & & 0.42 & 0.55 & V & $ I _ { OL } $ =188mA \\
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& & & & 0.7 & V & $ I _ { OL } $ =376mA \\
\hline
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Minimum pulse width\repeatfootnote { isolator} \textsuperscript { ,} \repeatfootnote { sinara187} & & & 3 & 5 & ns & \\
\hline
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Pulse width distortion\repeatfootnote { isolator} & $ PWD $ & & 0.2 & 4.5 & ns & \\
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\hline
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Peak jitter\repeatfootnote { isolator} & $ T _ { JIT ( PK ) } $ & & 350 & & ps & \\
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\hline
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Data rate\repeatfootnote { isolator} & & 0 & & 150 & Mbps & \\
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\thickhline
\end { tabularx}
\end { threeparttable}
\end { table}
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\newpage
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Minimum pulse width was measured\repeatfootnote { sinara187} .
Pulses were generated from a DDS generator as an input of a BNC-TTL card.
The input BNC-TTL card is connected to another BNC-TTL card as an output.
The output signal is measured and shown.
\begin { figure} [h]
\centering
\includegraphics [height=3in] { bnc_ ttl_ min_ pulse_ width.png}
\caption { Minimum pulse width required for BNC-TTL card}
\end { figure}
The red trace refers to the input pulses from the DDS generator, while the blue trace is the measured signal from the output BNC-TTL card.
Note that the first input (red) pulse could not propagate through the signal chain.
The first output (blue) pulse is the result of the second input (red, 3ns width) pulse.
\newpage
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\section { Front Panel Drawings}
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\begin { multicols} { 2}
\begin { center}
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\centering
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\includegraphics [height=3in] { sma_ ttl_ drawings.pdf}
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\captionof { figure} { 2128 SMA-TTL front panel drawings}
\end { center}
\begin { center}
\captionof { table} { Bill of Material (Standalone)}
\tiny
\begin { tabular} { |c|c|c|c|}
\hline
Index & Part No. & Qty & Description \\ \hline
1 & 90531967 & 1 & FRONT PANEL 3U 4HP PIU TYPE2 \\ \hline
2 & 3020716 & 0.02 & SLEEVE GREY PLAS.M2.5 (100PCS) \\ \hline
3 & 3218843 & 2 & FP-ALIGNMENT PIN (LOCALIZATION) \\ \hline
\end { tabular}
\end { center}
\columnbreak
\begin { center}
\centering
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\includegraphics [height=3in] { sma_ ttl_ assembly.pdf}
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\captionof { figure} { 2128 SMA-TTL front panel assembly}
\end { center}
\begin { center}
\captionof { table} { Bill of Material (Assembled)}
\tiny
\begin { tabular} { |c|c|c|c|}
\hline
Index & Part No. & Qty & Description \\ \hline
1 & 90531967 & 1 & FP-LYKJ 3U4HP PANEL \\ \hline
2 & 3001012 & 2 & SCR M2.5*6 PAN PHL NI DIN7985 \\ \hline
3 & 3010110 & 0.02 & WASHER PLN.M2.7 DIN125 (100X) \\ \hline
4 & 3010124 & 0.1 & EMC GASKET FABRIC 3U (10PCS) \\ \hline
5 & 3001012 & 1 & HANDLE 4HP GREY PLASTIC \\ \hline
6 & 3040138 & 2 & PB HOLDER DIE-CAST \\ \hline
7 & 3207075 & 0.01 & SCR M2.5*12 PAN 100 21101-221 \\ \hline
8 & 3033098 & 0.02 & SCREW COLLAR M2.5X12.3 (100X) \\ \hline
9 & 3201099 & 0.01 & SCR M2.5*8 OVL PHL ST NI 100EA \\ \hline
\end { tabular}
\end { center}
\end { multicols}
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\newpage
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\section { Configuring IO Direction \& Termination}
The termination and IO direction can be configured by switches.
The per-channel termination and per-bank IO direction switches are found at the middle-left and middle-right of both cards respectively.
Termination switches selects the termination of each channel, between high impedence (OFF) and 50\textOmega ~(ON).
IO direction switches partly decides the IO direction of each bank.
\begin { itemize}
\itemsep 0em
\item Closed switch (ON) \\
Fix the corresponding bank to output. The direction cannot be changed by I\textsuperscript { 2} C.
\item Opened switch (OFF) \\
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Switch to input mode. The direction is input by default. Configurable by I\textsuperscript { 2} C.
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\end { itemize}
\begin { figure} [hbt!]
\centering
\subfloat [\centering BNC-TTL] { {
\includegraphics [height=1.5in] { bnc_ ttl_ switches.jpg}
} } %
\subfloat [\centering SMA-TTL] { {
\includegraphics [height=1.5in] { sma_ ttl_ switches.jpg}
} } %
\caption { Position of switches} %
\end { figure}
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\section { Example ARTIQ code}
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The sections below demonstrate simple usage scenarios of the 2118 BNC-TTL/2128 SMA-TTL card with the ARTIQ control system.
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They do not exhaustively demonstrate all the features of the ARTIQ system.
The full documentation for the ARTIQ software and gateware is available at \url { https://m-labs.hk} .
Timing accuracy in the examples below is well under 1 nanosecond thanks to the ARTIQ RTIO system.
\subsection { One pulse per second}
The channel should be configured as output in both the gateware and hardware.
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\inputcolorboxminted { firstline=9,lastline=14} { examples/ttl.py}
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\newpage
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\subsection { Sub-coarse-RTIO-cycle pulse}
With the use of the ARTIQ RTIO, only 1 event can be enqueued per coarse RTIO cycle, which is typically 8ns.
Therefore, to emit a pulse that is less than 8ns, additional delay is needed such that the \texttt { ttl.on()} \& \texttt { ttl.off()} event are submitted at different coarse RTIO cycles.
The TTL pulse parameter must satisfy the minimum pulse width stated in the electircal specifications.
\inputcolorboxminted { firstline=88,lastline=92} { examples/ttl.py}
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\subsection { Morse code}
This example demonstrates some basic algorithmic features of the ARTIQ-Python language.
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\inputcolorboxminted { firstline=22,lastline=39} { examples/ttl.py}
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\newpage
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\subsection { Counting rising edges in a 1ms window}
The channel should be configured as input in both the gateware and hardware.
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\inputcolorboxminted { firstline=47,lastline=52} { examples/ttl.py}
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This example code uses the software counter, which has a maximum count rate of approximately 1 million events per second.
If the gateware counter is enabled on the TTL channel, it can typically count up to 125 million events per second:
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\inputcolorboxminted { firstline=60,lastline=65} { examples/ttl.py}
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To count falling edges or both rising \& falling edges, use \texttt { gate\char `_ falling()} or \texttt { gate\char `_ both()} .
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\subsection { Responding to an external trigger}
One channel needs to be configured as input, and the other as output.
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\inputcolorboxminted { firstline=74,lastline=80} { examples/ttl.py}
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\subsection { 62.5 MHz clock signal generation}
A TTL channel can be configured as a \texttt { ClockGen} channel, which generates a periodic clock signal.
Each channel has a phase accumulator operating on the RTIO clock, where it is incremented by the frequency tuning word at each coarse RTIO cycle.
Therefore, jitter should be expected when the desired frequency cannot be obtained by dividing the coarse RTIO clock frequency with a power of 2. \\
Typically, with the coarse RTIO clock at 125 MHz, a \texttt { ClockGen} channel can generate up to 62.5 MHz.
\inputcolorboxminted { firstline=100,lastline=103} { examples/ttl.py}
\newpage
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\section { Ordering Information}
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To order, please visit \url { https://m-labs.hk} and select the 2118 BNC-TTL/2128 SMA-TTL in the ARTIQ Sinara crate configuration tool. The card may also be ordered separately by writing to \url { mailto:sales@m-labs.hk} .
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\section * { }
\vspace * { \fill }
\begin { footnotesize}
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Information furnished by M-Labs Limited is provided in good faith in the hope that it will be useful. However, no responsibility is assumed by M-Labs Limited for its use. Specifications may be subject to change without notice.
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\end { footnotesize}
\end { document}
