forked from M-Labs/nac3
core: Add CodeGenTargetMachineOptions
Needed in a future commit.
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parent
eb63f2ad48
commit
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@ -12,7 +12,7 @@ use inkwell::{
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targets::*,
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OptimizationLevel,
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};
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use nac3core::codegen::{CodeGenLLVMOptions, gen_func_impl};
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use nac3core::codegen::{CodeGenLLVMOptions, CodeGenTargetMachineOptions, gen_func_impl};
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use nac3core::toplevel::builtins::get_exn_constructor;
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use nac3core::typecheck::typedef::{TypeEnum, Unifier};
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use nac3parser::{
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@ -664,34 +664,42 @@ impl Nac3 {
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link_fn(&main)
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}
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fn get_llvm_target_machine(
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&self,
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) -> TargetMachine {
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let (triple, features) = match self.isa {
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Isa::Host => (
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TargetMachine::get_default_triple(),
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TargetMachine::get_host_cpu_features().to_string(),
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),
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Isa::RiscV32G => {
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(TargetTriple::create("riscv32-unknown-linux"), "+a,+m,+f,+d".to_string())
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}
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Isa::RiscV32IMA => (TargetTriple::create("riscv32-unknown-linux"), "+a,+m".to_string()),
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Isa::CortexA9 => (
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TargetTriple::create("armv7-unknown-linux-gnueabihf"),
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"+dsp,+fp16,+neon,+vfp3,+long-calls".to_string(),
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),
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};
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let target =
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Target::from_triple(&triple).expect("couldn't create target from target triple");
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target
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.create_target_machine(
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&triple,
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"",
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&features,
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self.llvm_options.opt_level,
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RelocMode::PIC,
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CodeModel::Default,
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)
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/// Returns the [TargetTriple] used for compiling to [isa].
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fn get_llvm_target_triple(isa: Isa) -> TargetTriple {
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match isa {
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Isa::Host => TargetMachine::get_default_triple(),
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Isa::RiscV32G | Isa::RiscV32IMA => TargetTriple::create("riscv32-unknown-linux"),
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Isa::CortexA9 => TargetTriple::create("armv7-unknown-linux-gnueabihf"),
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}
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}
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/// Returns the [String] representing the target features used for compiling to [isa].
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fn get_llvm_target_features(isa: Isa) -> String {
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match isa {
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Isa::Host => TargetMachine::get_host_cpu_features().to_string(),
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Isa::RiscV32G => "+a,+m,+f,+d".to_string(),
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Isa::RiscV32IMA => "+a,+m".to_string(),
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Isa::CortexA9 => "+dsp,+fp16,+neon,+vfp3,+long-calls".to_string(),
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}
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}
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/// Returns an instance of [CodeGenTargetMachineOptions] representing the target machine
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/// options used for compiling to [isa].
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fn get_llvm_target_options(isa: Isa) -> CodeGenTargetMachineOptions {
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CodeGenTargetMachineOptions {
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triple: Nac3::get_llvm_target_triple(isa).as_str().to_string_lossy().into_owned(),
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cpu: String::default(),
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features: Nac3::get_llvm_target_features(isa),
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reloc_mode: RelocMode::PIC,
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..CodeGenTargetMachineOptions::from_host()
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}
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}
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/// Returns an instance of [TargetMachine] used in compiling and linking of a program to the
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/// target [isa].
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fn get_llvm_target_machine(&self) -> TargetMachine {
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Nac3::get_llvm_target_options(self.isa)
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.create_target_machine(self.llvm_options.opt_level)
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.expect("couldn't create target machine")
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}
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}
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@ -16,6 +16,7 @@ use inkwell::{
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context::Context,
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module::Module,
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passes::{PassManager, PassManagerBuilder},
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targets::{CodeModel, RelocMode, Target, TargetMachine, TargetTriple},
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types::{AnyType, BasicType, BasicTypeEnum},
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values::{BasicValueEnum, FunctionValue, PhiValue, PointerValue},
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debug_info::{
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@ -68,6 +69,67 @@ pub struct CodeGenLLVMOptions {
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pub emit_llvm: bool,
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}
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/// Additional options for code generation for the target machine.
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#[derive(Clone, Debug, Eq, PartialEq)]
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pub struct CodeGenTargetMachineOptions {
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/// The target machine triple.
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pub triple: String,
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/// The target machine CPU.
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pub cpu: String,
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/// Additional target machine features.
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pub features: String,
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/// Relocation mode for code generation.
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pub reloc_mode: RelocMode,
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/// Code model for code generation.
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pub code_model: CodeModel,
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}
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impl CodeGenTargetMachineOptions {
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/// Creates an instance of [CodeGenTargetMachineOptions] using the triple of the host machine.
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/// Other options are set to defaults.
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pub fn from_host_triple() -> CodeGenTargetMachineOptions {
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CodeGenTargetMachineOptions {
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triple: TargetMachine::get_default_triple().as_str().to_string_lossy().into_owned(),
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cpu: String::default(),
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features: String::default(),
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reloc_mode: RelocMode::Default,
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code_model: CodeModel::Default,
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}
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}
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/// Creates an instance of [CodeGenTargetMachineOptions] using the properties of the host
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/// machine. Other options are set to defaults.
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pub fn from_host() -> CodeGenTargetMachineOptions {
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CodeGenTargetMachineOptions {
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cpu: TargetMachine::get_host_cpu_name().to_string(),
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features: TargetMachine::get_host_cpu_features().to_string(),
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..CodeGenTargetMachineOptions::from_host_triple()
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}
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}
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/// Creates a [TargetMachine] using the target options specified by this struct.
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///
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/// See [Target::create_target_machine].
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pub fn create_target_machine(
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&self,
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level: OptimizationLevel,
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) -> Option<TargetMachine> {
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let triple = TargetTriple::create(self.triple.as_str());
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let target = Target::from_triple(&triple)
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.expect(format!("could not create target from target triple {}", self.triple).as_str());
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target.create_target_machine(
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&triple,
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self.cpu.as_str(),
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self.features.as_str(),
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level,
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self.reloc_mode,
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self.code_model
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)
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}
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}
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pub struct CodeGenContext<'ctx, 'a> {
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pub ctx: &'ctx Context,
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pub builder: Builder<'ctx>,
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