artiq/artiq/gateware
2023-06-02 17:21:32 +08:00
..
amp gateware: pass adr_w/data_w to submodules 2021-11-08 16:59:08 +08:00
drtio fix IBUFDS_GTE2 parameters 2023-05-30 11:49:13 +08:00
dsp sawg: don't use Cat() for signed signals 2018-06-09 07:33:47 +00:00
grabber grabber: fix frame size off-by-1 2018-09-07 16:55:43 +02:00
rtio dma: fix off-by-one error in RawSlicer (#2090) 2023-05-23 11:16:24 +08:00
suservo suservo: use default urukul profile 2022-01-10 16:21:39 +08:00
targets fix IBUFDS_GTE2 parameters 2023-05-30 11:49:13 +08:00
test dma: fix off-by-one error in RawSlicer (#2090) 2023-05-23 11:16:24 +08:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9_dds.py ad9xxx -> ad9_dds 2017-01-04 11:34:52 +01:00
eem_7series.py Urukul monitoring (#1142, #1921) 2022-07-07 10:52:53 +08:00
eem.py fix missing DIFF_TERM for Sampler and Mirny inputs 2023-06-02 17:21:32 +08:00
fmcdio_vhdci_eem.py fmcdio_vhdci_eem: fix pin naming 2020-08-31 16:21:45 +08:00
jesd204_tools.py jesd204_tools: use new syntax from jesd204b core 2020-12-19 17:05:20 +08:00
nist_clock.py gateware/nist_clock: increase DDS bus drive strength. Closes #468 2016-06-07 11:08:19 -04:00
nist_qc2.py qc2: swap SPI/TTL, all TTL lines are now In+Out compatible 2016-05-19 10:42:03 +08:00