.. |
amp
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gateware: pass adr_w/data_w to submodules
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2021-11-08 16:59:08 +08:00 |
drtio
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satman: add 100mhz si5324 settings
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2021-12-03 17:19:11 +08:00 |
dsp
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sawg: don't use Cat() for signed signals
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2018-06-09 07:33:47 +00:00 |
grabber
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grabber: fix frame size off-by-1
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2018-09-07 16:55:43 +02:00 |
rtio
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Urukul monitoring (#1142, #1921)
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2022-07-07 10:52:53 +08:00 |
suservo
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suservo: use default urukul profile
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2022-01-10 16:21:39 +08:00 |
targets
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kc705: add drtio 100mhz clk switch
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2021-12-03 17:19:11 +08:00 |
test
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gateware.test.suservo: Fix tests for python >=3.7
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2022-01-11 17:16:09 +08:00 |
__init__.py
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artiqlib -> artiq.gateware
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2015-03-08 11:00:24 +01:00 |
ad9_dds.py
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ad9xxx -> ad9_dds
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2017-01-04 11:34:52 +01:00 |
eem.py
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Urukul monitoring (#1142, #1921)
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2022-07-07 10:52:53 +08:00 |
eem_7series.py
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Urukul monitoring (#1142, #1921)
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2022-07-07 10:52:53 +08:00 |
fmcdio_vhdci_eem.py
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fmcdio_vhdci_eem: fix pin naming
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2020-08-31 16:21:45 +08:00 |
jesd204_tools.py
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jesd204_tools: use new syntax from jesd204b core
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2020-12-19 17:05:20 +08:00 |
nist_clock.py
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gateware/nist_clock: increase DDS bus drive strength. Closes #468
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2016-06-07 11:08:19 -04:00 |
nist_qc2.py
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qc2: swap SPI/TTL, all TTL lines are now In+Out compatible
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2016-05-19 10:42:03 +08:00 |