forked from M-Labs/artiq
237 lines
8.7 KiB
Python
237 lines
8.7 KiB
Python
"""Driver for RTIO-enabled TTL edge counter.
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Like for the TTL input PHYs, sensitivity can be configured over RTIO
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(``gate_rising()``, etc.). In contrast to the former, however, the count is
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accumulated in gateware, and only a single input event is generated at the end
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of each gate period::
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with parallel:
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doppler_cool()
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self.pmt_counter.gate_rising(1 * ms)
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with parallel:
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readout()
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self.pmt_counter.gate_rising(100 * us)
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print("Doppler cooling counts:", self.pmt_counter.fetch_count())
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print("Readout counts:", self.pmt_counter.fetch_count())
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For applications where the timestamps of the individual input events are not
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required, this has two advantages over ``TTLInOut.count()`` beyond raw
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throughput. First, it is easy to count events during multiple separate periods
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without blocking to read back counts in between, as illustrated in the above
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example. Secondly, as each count total only takes up a single input event, it
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is much easier to acquire counts on several channels in parallel without
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risking input FIFO overflows::
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# Using the TTLInOut driver, pmt_1 input events are only processed
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# after pmt_0 is done counting. To avoid RTIOOverflows, a round-robin
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# scheme would have to be implemented manually.
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with parallel:
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self.pmt_0.gate_rising(10 * ms)
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self.pmt_1.gate_rising(10 * ms)
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counts_0 = self.pmt_0.count(now_mu()) # blocks
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counts_1 = self.pmt_1.count(now_mu())
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#
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# Using gateware counters, only a single input event each is
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# generated, greatly reducing the load on the input FIFOs:
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with parallel:
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self.pmt_0_counter.gate_rising(10 * ms)
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self.pmt_1_counter.gate_rising(10 * ms)
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counts_0 = self.pmt_0_counter.fetch_count() # blocks
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counts_1 = self.pmt_1_counter.fetch_count()
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See :mod:`artiq.gateware.rtio.phy.edge_counter` and
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:meth:`artiq.gateware.eem.DIO.add_std` for the gateware components.
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"""
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from artiq.language.core import *
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from artiq.language.types import *
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from artiq.coredevice.rtio import (rtio_output, rtio_input_data,
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rtio_input_timestamped_data)
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from numpy import int32, int64
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CONFIG_COUNT_RISING = 0b0001
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CONFIG_COUNT_FALLING = 0b0010
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CONFIG_SEND_COUNT_EVENT = 0b0100
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CONFIG_RESET_TO_ZERO = 0b1000
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class CounterOverflow(Exception):
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"""Raised when an edge counter value is read which indicates that the
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counter might have overflowed."""
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pass
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class EdgeCounter:
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"""RTIO TTL edge counter driver driver.
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Like for regular TTL inputs, timeline periods where the counter is
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sensitive to a chosen set of input transitions can be specified. Unlike the
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former, however, the specified edges do not create individual input events;
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rather, the total count can be requested as a single input event from the
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core (typically at the end of the gate window).
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:param channel: The RTIO channel of the gateware phy.
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:param gateware_width: The width of the gateware counter register, in
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bits. This is only used for overflow handling; to change the size,
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the gateware needs to be rebuilt.
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"""
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kernel_invariants = {"core", "channel", "counter_max"}
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def __init__(self, dmgr, channel, gateware_width=31, core_device="core"):
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self.core = dmgr.get(core_device)
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self.channel = channel
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self.counter_max = (1 << (gateware_width - 1)) - 1
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@kernel
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def gate_rising(self, duration):
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"""Count rising edges for the given duration and request the total at
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the end.
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The counter is reset at the beginning of the gate period. Use
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:meth:`set_config` directly for more detailed control.
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:param duration: The duration for which the gate is to stay open.
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:return: The timestamp at the end of the gate period, in machine units.
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"""
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return self.gate_rising_mu(self.core.seconds_to_mu(duration))
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@kernel
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def gate_falling(self, duration):
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"""Count falling edges for the given duration and request the total at
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the end.
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The counter is reset at the beginning of the gate period. Use
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:meth:`set_config` directly for more detailed control.
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:param duration: The duration for which the gate is to stay open.
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:return: The timestamp at the end of the gate period, in machine units.
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"""
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return self.gate_falling_mu(self.core.seconds_to_mu(duration))
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@kernel
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def gate_both(self, duration):
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"""Count both rising and falling edges for the given duration, and
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request the total at the end.
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The counter is reset at the beginning of the gate period. Use
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:meth:`set_config` directly for more detailed control.
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:param duration: The duration for which the gate is to stay open.
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:return: The timestamp at the end of the gate period, in machine units.
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"""
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return self.gate_both_mu(self.core.seconds_to_mu(duration))
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@kernel
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def gate_rising_mu(self, duration_mu):
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"""See :meth:`gate_rising`."""
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return self._gate_mu(
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duration_mu, count_rising=True, count_falling=False)
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@kernel
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def gate_falling_mu(self, duration_mu):
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"""See :meth:`gate_falling`."""
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return self._gate_mu(
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duration_mu, count_rising=False, count_falling=True)
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@kernel
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def gate_both_mu(self, duration_mu):
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"""See :meth:`gate_both_mu`."""
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return self._gate_mu(
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duration_mu, count_rising=True, count_falling=True)
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@kernel
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def _gate_mu(self, duration_mu, count_rising, count_falling):
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self.set_config(
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count_rising=count_rising,
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count_falling=count_falling,
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send_count_event=False,
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reset_to_zero=True)
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delay_mu(duration_mu)
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self.set_config(
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count_rising=False,
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count_falling=False,
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send_count_event=True,
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reset_to_zero=False)
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return now_mu()
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@kernel
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def set_config(self, count_rising: TBool, count_falling: TBool,
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send_count_event: TBool, reset_to_zero: TBool):
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"""Emit an RTIO event at the current timeline position to set the
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gateware configuration.
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For most use cases, the `gate_*` wrappers will be more convenient.
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:param count_rising: Whether to count rising signal edges.
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:param count_falling: Whether to count falling signal edges.
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:param send_count_event: If `True`, an input event with the current
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counter value is generated on the next clock cycle (once).
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:param reset_to_zero: If `True`, the counter value is reset to zero on
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the next clock cycle (once).
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"""
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config = int32(0)
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if count_rising:
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config |= CONFIG_COUNT_RISING
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if count_falling:
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config |= CONFIG_COUNT_FALLING
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if send_count_event:
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config |= CONFIG_SEND_COUNT_EVENT
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if reset_to_zero:
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config |= CONFIG_RESET_TO_ZERO
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rtio_output(self.channel << 8, config)
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@kernel
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def fetch_count(self) -> TInt32:
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"""Wait for and return count total from previously requested input
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event.
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It is valid to trigger multiple gate periods without immediately
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reading back the count total; the results will be returned in order on
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subsequent fetch calls.
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This function blocks until a result becomes available.
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"""
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count = rtio_input_data(self.channel)
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if count == self.counter_max:
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raise CounterOverflow(
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"Input edge counter overflow on RTIO channel {0}",
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int64(self.channel))
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return count
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@kernel
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def fetch_timestamped_count(
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self, timeout_mu=int64(-1)) -> TTuple([TInt64, TInt32]):
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"""Wait for and return the timestamp and count total of a previously
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requested input event.
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It is valid to trigger multiple gate periods without immediately
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reading back the count total; the results will be returned in order on
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subsequent fetch calls.
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This function blocks until a result becomes available or the given
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timeout elapses.
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:return: A tuple of timestamp (-1 if timeout elapsed) and counter
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value. (The timestamp is that of the requested input event –
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typically the gate closing time – and not that of any input edges.)
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"""
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timestamp, count = rtio_input_timestamped_data(timeout_mu,
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self.channel)
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if count == self.counter_max:
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raise CounterOverflow(
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"Input edge counter overflow on RTIO channel {0}",
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int64(self.channel))
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return timestamp, count
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