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Sebastien Bourdeauducq df1513f0e9 add aqctl_moninj_proxy to device dbs 2022-03-19 19:25:21 +08:00
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kasli add aqctl_moninj_proxy to device dbs 2022-03-19 19:25:21 +08:00
kasli_drtioswitching add aqctl_moninj_proxy to device dbs 2022-03-19 19:25:21 +08:00
kasli_sawgmaster add aqctl_moninj_proxy to device dbs 2022-03-19 19:25:21 +08:00
kasli_suservo add aqctl_moninj_proxy to device dbs 2022-03-19 19:25:21 +08:00
kc705_nist_clock add aqctl_moninj_proxy to device dbs 2022-03-19 19:25:21 +08:00
metlino_sayma_ttl add aqctl_moninj_proxy to device dbs 2022-03-19 19:25:21 +08:00
no_hardware use sipyco (#585) 2019-11-10 15:55:17 +08:00
sayma_master add aqctl_moninj_proxy to device dbs 2022-03-19 19:25:21 +08:00
README.rst examples: Add README 2019-12-17 13:35:19 +00:00
artiq_ipython_notebook.ipynb fix device_db alias corner case bugs. Closes #1140 2019-11-14 16:22:45 +08:00
fit_image.py ship examples with package 2016-04-05 13:59:39 +08:00
remote_exec_controller.py use sipyco (#585) 2019-11-10 15:55:17 +08:00

README.rst 

ARTIQ experiment examples
=========================

This directory contains several sample ARTIQ master configurations
and associated experiments that illustrate basic usage of various
hardware and software features.

New users might want to peruse the ``no_hardware`` directory to
explore the argument/dataset machinery without needing access to
hardware, and the ``kc705_nist_clock`` directory for inspiration
on how to coordinate between host and FPGA core device code.