artiq/artiq/gateware
2015-07-28 12:54:31 -06:00
..
amp gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache 2015-06-18 12:18:03 +02:00
rtio serdes_s6: no need to reset 2015-07-28 12:54:31 -06:00
__init__.py artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
ad9xxx.py complete AD9914 support (no programmable modulus, untested) 2015-07-08 17:22:43 +02:00
nist_qc1.py pipistrello: add notes to nist_qc1 about dds_clock 2015-06-28 20:56:12 -06:00
nist_qc2.py soc: support QC2 and AD9914 (untested) 2015-06-28 21:37:27 +02:00
soc.py gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache 2015-06-18 12:18:03 +02:00