artiq/artiq/compiler
2015-12-19 05:26:18 +08:00
..
algorithms transforms.interleaver: unroll loops. 2015-12-17 00:52:22 +08:00
analyses analyses.domination: consider unreachable blocks dominated by any other. 2015-12-18 16:39:52 +08:00
testbench compiler: explicitly represent loops in IR. 2015-12-16 15:33:26 +08:00
transforms Initial invocation of a @kernel function can now return a value (fixes #197). 2015-12-19 05:26:18 +08:00
validators validators.escape: don't fail on quoted values in lhs. 2015-12-16 13:57:02 +08:00
__init__.py compiler: pull in dependencies in more finely grained way (fixes #181). 2015-11-24 17:32:04 +08:00
asttyped.py compiler: explicitly represent loops in IR. 2015-12-16 15:33:26 +08:00
builtins.py compiler: implement 'with watchdog' support. 2015-12-10 23:11:00 +08:00
embedding.py Initial invocation of a @kernel function can now return a value (fixes #197). 2015-12-19 05:26:18 +08:00
iodelay.py compiler.iodelay: correctly fold max(0, [0, ]...). 2015-11-24 00:46:55 +08:00
ir.py compiler: give environment types in LLVM IR readable names. 2015-12-18 23:41:51 +08:00
module.py analyses.domination: consider unreachable blocks dominated by any other. 2015-12-18 16:39:52 +08:00
prelude.py compiler.prelude: add @portable as an alias for @kernel. 2015-12-18 23:00:29 +08:00
targets.py compiler: make IR dumps vastly more readable. 2015-11-17 00:23:34 +03:00
types.py compiler.types: make TValue hashable. 2015-12-18 17:31:20 +08:00