artiq/artiq/coredevice
Robert Jordens 4a0eaf0f95 phaser: add jesd204b rtio dds
gateware: add jesd204b awg

gateware: copy phaser (df3825a)
dsp/tools: update satadd mixin
phaser: no DDS stubs
dsp: accu fix
phaser: cleanup/reduce

sawg: kernel support and docs

sawg: coredevice api fixes

sawg: example ddb/experiment

phaser: add conda package

examples/phaser: typo

sawg: adapt tests, fix accu stb

sawg: tweak dds parameters

sawg: move/adapt/extend tests

sawg: test phy, refactor

phaser: non-rtio spi

phaser: target cli update

phaser: ad9154-fmc-ebz pins

phaser: reorganize fmc signal naming

phaser: add test mode stubs

phaser: txen is LVTTL

phaser: clk spi xfer test

phaser: spi for ad9154 and ad9516

phaser: spi tweaks

ad9154: add register map from ad9144.xml

ad9516: add register map from ad9517.xml and manual adaptation

ad9154_reg: just generate getter/setter macros as well

ad9154: reg WIP

ad9154: check and fix registers

kc705: single ended rtio_external_clk

use single ended user_sma_clk_n instead of p/n to free up one clock sma

kc705: mirror clk200 at user_sma_clock_p

ad9516_regs.h: fix B_COUNTER_MSB

phase: wire up clocking differently

needs patched misoc

kc705: feed rtio_external_clock directly

kc705: remove rtio_external_clk for phaser

phaser: spi tweaks

ad9516: some startup

ad9516_reg fixes

phaser: setup ad9516 for supposed 500 MHz operation

ad9516: use full duplex spi

ad9154_reg: add CONFIG_REG_2

ad9154_reg: fixes

phaser: write some ad9154 config

ad9154_reg: fixes

ad9154: more init, and human readable setup

ad9154/ad9516: merge spi support

ad9154: status readout

Revert "kc705: remove rtio_external_clk for phaser"

This reverts commit d500288bb44f2bf2eeb0c2f237aa207b0a8b1366.

Revert "kc705: feed rtio_external_clock directly"

This reverts commit 8dc7825519e3e75b7d3d29c9abf10fc6e3a8b4c5.

Revert "phase: wire up clocking differently"

This reverts commit ad9cc450ffa35abb54b0842d56f6cf6c53c6fbcc.

Revert "kc705: mirror clk200 at user_sma_clock_p"

This reverts commit 7f0dffdcdd28e648af84725682f82ec6e5642eba.

Revert "kc705: single ended rtio_external_clk"

This reverts commit a9426d983fbf5c1cb768da8f1da26d9b7335e9cf.

ad9516: 2000 MHz clock

phaser: test clock dist

phaser: test freqs

ad9154: iostandards

phaser: drop clock monitor

phaser: no separate i2c

phaser: drive rtio from refclk, wire up sysref

phaser: ttl channel for sync

ad9154: 4x interp, status, tweaks

phaser: sync/sysref 33V banks

phaser: sync/sysref LVDS_25 inputs are VCCO tolerant

phaser: user input-only ttls

phaser: rtio fully from refclk

ad9154: reg name usage fix

ad9154: check register modifications

Revert "ad9154: check register modifications"

This reverts commit 45121d90edf89f7bd8703503f9f317ad050f9564.

ad9154: fix status code

ad9154: addrinc, recal serdes pll

phaser: coredevice, example tweaks

sawg: missing import

sawg: type fixes

ad9514: move setup functions

ad9154: msb first also decreasing addr

phaser: use sys4x for rtio internal ref

phaser: move init code to main

phaser: naming cleanup

phaser: cleanup pins

phaser: move spi to kernel cpu

phaser: kernel support for ad9154 spi

ad9154: add r/w methods

ad9154: need return annotations

ad9154: r/w methods are kernels

ad9154_reg: portable helpers

phaser: cleanup startup kernel

ad9154: status test

ad9154: prbs test

ad9154: move setup, document

phaser: more documentation
2016-10-05 16:17:50 +02:00
..
__init__.py coredevice: only import common RTIO exceptions 2016-03-19 12:11:47 +08:00
ad5360.py ad5360: add documentation and an example 2016-03-04 23:36:17 +01:00
ad9154_reg.py phaser: add jesd204b rtio dds 2016-10-05 16:17:50 +02:00
ad9154.py phaser: add jesd204b rtio dds 2016-10-05 16:17:50 +02:00
ad9516_reg.py phaser: add jesd204b rtio dds 2016-10-05 16:17:50 +02:00
analyzer.py coreanalyzer: fix rtio_log message extraction. 2016-09-14 10:18:00 +00:00
cache.py compiler: allow specifying per-function "fast-math" flags. 2016-03-28 21:44:08 +00:00
comm_dummy.py embedding: refactor some more. 2016-05-16 14:38:09 +00:00
comm_generic.py Also serialize numpy.int{32,64} like int in RPC return values. 2016-09-09 08:52:18 +00:00
comm_tcp.py coredevice/comm_tcp: more appropriate exception 2016-06-26 19:08:40 +08:00
core.py coredevice/core: add syscall type annotation 2016-06-29 10:38:19 +08:00
dds.py dds: fix docstring, closes #540 2016-08-16 14:55:30 +08:00
exceptions.py coredevice: format backtrace RA as +0xN, not 0xN. 2016-04-02 18:05:40 +00:00
i2c.py coredevice/TCA6424A: convert 'outputs' value to little endian. Closes #437 2016-05-22 06:53:18 -07:00
rtio.py compiler: allow specifying per-function "fast-math" flags. 2016-03-28 21:44:08 +00:00
runtime.py artiq_dir: move out of tools to unlink dependencies 2016-01-25 18:15:50 -07:00
sawg.py phaser: add jesd204b rtio dds 2016-10-05 16:17:50 +02:00
spi.py language: replace coredevice int with numpy.{int32,int64}. 2016-07-06 04:44:21 +00:00
ttl.py coredevice/ttl: fix imports 2016-09-07 17:37:14 +08:00