Commit Graph

5726 Commits

Author SHA1 Message Date
whitequark
fa4dc1bf0e doc: developing: show how to make clang source builds faster. 2017-12-24 16:27:54 +00:00
70b7f28ad3 drtio: drive SFP TX disable pins 2017-12-23 22:58:51 +08:00
00ed51f6f4 satman: use new alloc_list (#880) 2017-12-23 22:15:39 +08:00
f8c8f3fe26 drtio: fix GTH clock domains 2017-12-23 07:21:44 +08:00
1af21c0b29 drtio: integrate GTH transceiver for Sayma 2017-12-23 01:19:59 +08:00
c57b66497c drtio: refactor/simplify GTH, use migen 2017-12-23 01:19:44 +08:00
77897228ca drtio: add GTH transceiver code from Florent (197c79d47) 2017-12-22 18:01:28 +08:00
ebdbaaad32 drtio: remove KC705/GTX support 2017-12-22 17:51:42 +08:00
0681d472c7 conda: fix sayma_rtm_csr.csv location for Sayma AMC 2017-12-22 17:14:10 +08:00
cbd69287a7 artiq_flash: select Sayma standalone variant by default 2017-12-22 16:54:06 +08:00
44959144d8 conda: add Sayma AMC standalone board package 2017-12-22 16:44:04 +08:00
e43e14152a conda: remove BUILD_SETTINGS_FILE boilerplate 2017-12-22 09:15:22 +08:00
Florent Kermarrec
86825a852c gateware/targets/sayma_rtm: add false path between cd_sys and cd_clk200 2017-12-21 23:52:44 +01:00
8adb50037f conda: remove superfluous SoC build command line arguments 2017-12-22 00:01:26 +08:00
6cad942041 conda: add Sayma RTM package 2017-12-21 23:59:14 +08:00
69d7e93e99 drtio: adapt examples to Sayma 2017-12-21 23:09:19 +08:00
a6ffe9f38d drtio: add Sayma top-level designs 2017-12-21 23:08:56 +08:00
4fbc8772a5 sayma: allocate all user LEDs to RTIO, make one TTL SMA input 2017-12-21 19:27:38 +08:00
a23251276d Revert "sayma: set up Si5324 for RGMII clock rerouting"
This reverts commit 2b01aa22b6.
2017-12-21 14:42:15 +08:00
whitequark
701308474f runtime: update smoltcp. 2017-12-19 15:51:03 +00:00
whitequark
aaba36be7a runtime: log moninj messages at TRACE level, like all others. 2017-12-16 22:39:13 +00:00
whitequark
8cece4f260 runtime: hotswap slightly more carefully.
This generally lets some last characters out of UART, last ACKs
out of queues, etc. Nothing guaranteed though.
2017-12-16 22:39:13 +00:00
whitequark
4a9d8c9459 runtime: fix a warning. 2017-12-16 22:39:13 +00:00
2b01aa22b6 sayma: set up Si5324 for RGMII clock rerouting 2017-12-17 00:25:33 +08:00
David Nadlinger
c3c13da1a6 dashboard: Restore minimized experiments when trying to open them again
When the user tried to open an experiment from the explorer that
already existed, previously "nothing would happen" (focus change
without the window being restored).
2017-12-15 19:11:09 +00:00
25022b28c3 conda: bump migen+misoc 2017-12-16 00:10:49 +08:00
b6199bb35b sayma: style 2017-12-15 19:45:51 +08:00
649b60ea29 targets/kc705_drtio: remove DAC FMC card support 2017-12-15 17:32:25 +08:00
f02c74cb7b libboard/si5324: enable both clock outputs 2017-12-15 16:56:44 +08:00
9caef3c1d3 libboard/si5324: configure I2C mux on Sayma 2017-12-15 16:45:26 +08:00
341e809859 targets/sayma_rtm: enable Allaki RF switches, GPIO access to attenuator 2017-12-15 13:08:35 +08:00
77977932f2 firmware: remove AD9516 support
This was only used in KC705 phaser.
2017-12-14 19:16:39 +08:00
2e74ce25d8 examples/sayma: make LED blink pattern more peculiar 2017-12-14 19:10:34 +08:00
100c2b1769 add Sayma LED blinker example 2017-12-14 18:49:50 +08:00
569484f888 remove phaser, adapt SAWG example to Sayma 2017-12-14 18:49:27 +08:00
5809e08686 runtime: no startup_clock config is not an error 2017-12-14 12:39:26 +08:00
71db953ea0 artiq_flash: add srcbuild option to look into MiSoC source build trees. Closes #868 2017-12-14 10:36:32 +08:00
5e251cd85c sayma_amc: remove redundant bitstream options
* CONFIGRATE default is sufficient
* SPI width can be auto and QSPI works
2017-12-13 14:39:32 +01:00
a9d0f253a5 sayma_amc: set bitstream and config parameters
* slow down CCLK rate as there is additional loading
  on the signals
* single bit SPI for now until we know that quad SPI
  works
* set up

https://github.com/m-labs/artiq/issues/847
2017-12-13 21:21:52 +08:00
2917208d89 artiq_flash: fix sayma flashing
* do not include jtagspi as it already instantiates a flash bank
  instead define the target manually
* erase before writing
* verify written images
2017-12-13 21:20:16 +08:00
whitequark
3cf5cef168 artiq_pcap: still grab the file if the command fails. 2017-12-08 07:36:56 +00:00
whitequark
9e8bb1d51c runtime: update smoltcp. 2017-12-08 07:36:56 +00:00
d6f62c5697 DEVELOPER_NOTES: add old release branch deprecation 2017-12-07 12:32:58 +01:00
63f65b6e53 doc: clean up artiq-dev installation instructions
Add a heading to the openocd setup instruction so that it is
clearly distinguishable from the openocd installation. Otherwise people
"re-install" openocd the wrong way.
2017-12-07 12:31:30 +01:00
69b2d1abfc conda/artiq-dev: fix channel list
Now, with conda 4.1 packages are sorted by channel, version, build
number in decreasing priority. The highest matching package is
taken. https://conda.io/docs/user-guide/tasks/manage-channels.html

For the artiq-dev environment, the m-labs/label/dev channel should be
first, then the main channel, then defaults, and then conda-forge
(community supported packages).

closes #864
2017-12-07 12:31:30 +01:00
825f1ff1ce move RELEASING into DEVELOPER_NOTES 2017-12-07 13:24:06 +08:00
e5d8314aa7 RELEASE_NOTES: 3.1 2017-12-07 13:23:11 +08:00
a44f8282dc test_performance: relax network speed to 2 MB/s
At QUARTIQ I am getting 2.4/2.3 MB/s and with single switch at M-Labs we
apparently regularly met 2.2/2.2 MB/s. But with the current multiple
switches and one of them being a problematic switch that triggered #837
it looks like it is a tad slower.

http://buildbot.m-labs.hk/builders/artiq/builds/1818/steps/python_coverage_1/logs/stdio
2017-12-06 17:21:41 +01:00
c47006b154 conda: bump migen
Relevant changes:

* Kasli
2017-12-06 16:55:27 +01:00
fcbf6fde8a conda: bump misoc again
(wrong version in previous commit)
shot at #837
2017-12-06 16:50:44 +01:00