whitequark
31b5154222
conda: update llvmlite-artiq dependency.
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Build 22 includes debug information support.
2016-04-14 18:10:17 +08:00
whitequark
89326fb189
compiler: purge generated functions from backtraces.
2016-04-14 18:09:59 +08:00
whitequark
a2f6e81c50
ttl: mark constant attributes for TTL{In,InOut,ClockGen}.
2016-04-14 18:09:59 +08:00
whitequark
702e959033
llvm_ir_generator: add TBAA metadata for @now.
2016-04-14 18:09:59 +08:00
whitequark
f958cba4ed
llvm_ir_generator: update debug info emission for LLVM 3.8.
2016-04-14 18:09:36 +08:00
whitequark
7c520aa0c4
coredevice: format backtrace RA as +0xN, not 0xN.
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The absolute address is somewhere in the 0x4000000 range; the one
that is displayed is an offset from the shared object base.
2016-04-14 18:09:36 +08:00
whitequark
66bbee51d8
conda: require llvmlite-artiq built for LLVM 3.8.
2016-04-14 18:09:09 +08:00
whitequark
f26990aa57
compiler: emit verbose assembly via ARTIQ_DUMP_ASM.
2016-04-14 18:09:02 +08:00
whitequark
c89c27e389
compiler: add analysis passes from TargetMachine.
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This doesn't have any effect right now, but is the right thing to do.
2016-04-14 18:08:47 +08:00
whitequark
1120c264b1
compiler: mark loaded pointers as !dereferenceable.
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Also, lower the bound for test_pulse_rate_dds, since we generate
better code for it now.
2016-04-14 18:08:47 +08:00
whitequark
03b6555d9d
compiler: update for LLVM 3.7.
2016-04-14 18:08:28 +08:00
whitequark
932e680f3e
compiler: use correct data layout.
2016-04-14 18:07:56 +08:00
whitequark
f59fd8faec
llvm_ir_generator: do not use 'coldcc' calling convention.
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First, this calling convention doesn't actually exist in OR1K
and trying to use it in Asserts build causes an UNREACHABLE.
Second, I tried to introduce it and it does not appear to produce
any measurable benefit: not only OR1K has a ton of CSRs but also
it is quite hard, if not realistically impossible, to produce
the kind of register pressure that would be relieved by sparing
a few more CSRs for our exception raising function calls, since
temporaries don't have to be preserved before a noreturn call
and spilling over ten registers across an exceptional edge
is not something that the code we care about would do.
Third, it produces measurable drawbacks: it inflates code size
of check:* functions by adding spills. Of course, this could be
alleviated by making __artiq_raise coldcc as well, but what's
the point anyway?
2016-04-14 18:07:35 +08:00
whitequark
e416246e78
llvm_ir_generator: mark loads as non-null where applicable.
2016-04-14 18:07:35 +08:00
whitequark
50ae17649d
test: relax lit/embedding/syscall_flags.
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We currently have broken debug info. In either case, debug info
is irrelevant to this test.
2016-04-14 18:07:35 +08:00
whitequark
f7603dcb6f
compiler: fix ARTIQ_DUMP_ELF.
2016-04-14 18:07:17 +08:00
whitequark
812e79b63d
llvm_ir_generator: don't mark non-constant attribute loads as invariant.
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Oops.
2016-04-14 18:07:13 +08:00
whitequark
dcb0ffdd03
Commit missing parts of 1d8b0d46.
2016-04-14 18:07:04 +08:00
whitequark
ee7e648cb0
compiler: allow specifying per-function "fast-math" flags.
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Fixes #351 .
2016-04-14 18:07:04 +08:00
whitequark
5fafcc1341
Commit missing parts of 6f5332f8.
2016-04-14 18:07:04 +08:00
whitequark
f7d4a37df9
compiler: allow flagging syscalls, providing information to optimizer.
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This also fixes a crash in test_cache introduced in 1d8b0d46
2016-04-14 18:06:47 +08:00
whitequark
c6b21652ba
compiler: mark FFI functions as ModRef=Ref using TBAA metadata.
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Fascinatingly, the fact that you can mark call instructions with
!tbaa metadata is completely undocumented. Regardless, it is true:
a !tbaa metadata for an "immutable" type will cause
AliasAnalysis::getModRefBehavior to return OnlyReadsMemory for that
call site.
Don't bother marking loads with TBAA yet since we already place
!load.invariant on them (which is as good as the TBAA "immutable"
flag) and after that we're limited by lack of !nonnull anyway.
Also, add TBAA analysis passes in our pipeline to actually engage it.
2016-04-14 18:06:47 +08:00
whitequark
0e0f81b509
compiler: mark loads of kernel constant attributes as load invariant.
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Also, enable LICM, since it can take advantage of this.
2016-04-14 18:06:47 +08:00
whitequark
081edb27d7
coredevice: add some kernel_constant_attributes specifications.
2016-04-14 18:06:47 +08:00
whitequark
b5fd257a33
compiler: do not write back kernel constant attributes.
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Fixes #322 .
2016-04-14 18:06:21 +08:00
whitequark
665e59e064
compiler: implement kernel constant attributes.
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Part of #322 .
2016-04-14 18:06:21 +08:00
whitequark
348e058c6f
test_pulse_rate_dds: tighten upper bound to 400us.
2016-04-14 18:06:06 +08:00
whitequark
718d411dd5
compiler: run IPSCCP.
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This doesn't do much, only frees some registers.
2016-04-14 18:05:57 +08:00
whitequark
019f528ea6
compiler: raise inliner threshold to the equivalent of -O3.
2016-04-14 18:05:57 +08:00
whitequark
3fa5762c10
compiler: extract runtime checks into separate cold functions.
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This reduces register pressure as well as function size, which
favorably affects the inliner.
2016-04-14 18:05:57 +08:00
whitequark
fcf2a73f82
test_pulse_rate: tighten upper bound to 1500ns.
2016-04-14 18:05:31 +08:00
whitequark
92f3dc705f
llvm_ir_generator: generate code more amenable to LLVM's GlobalOpt.
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This exposes almost all embedded methods to inlining, with massive
gains.
2016-04-14 18:05:10 +08:00
whitequark
f2c92fffea
compiler: make quoted functions independent of outer environment.
2016-04-14 18:04:42 +08:00
whitequark
ccb1d54beb
compiler: tune the LLVM optimizer pipeline ( fixes #315 ).
2016-04-14 18:04:42 +08:00
whitequark
8fa4281470
compiler: significantly increase readability of LLVM and ARTIQ IRs.
2016-04-14 18:04:42 +08:00
whitequark
e534941383
compiler: quote functions directly instead of going through a local.
2016-04-14 18:04:22 +08:00
whitequark
f72e050af5
transforms.llvm_ir_generator: extract class function attributes.
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This should give LLVM more visibility.
2016-04-14 18:04:22 +08:00
whitequark
00facbbc78
compiler: get rid of the GetConstructor opcode.
2016-04-14 18:04:22 +08:00
321ba57e84
manual/installing: --toolchain vivado
2016-04-14 01:25:48 +08:00
582efe5b91
typo
2016-04-14 01:17:47 +08:00
349ccfb633
gateware/nist_qc2: substitute FMC
2016-04-14 01:04:19 +08:00
71b9ba6ab7
manual/faq: list HITL TTL connections
2016-04-14 01:04:19 +08:00
317e6ea38d
manual/git: commit needed before starting master, refresh. Closes #387
2016-04-14 01:04:19 +08:00
dhslichter
08e742ce68
Updated qc2 pinouts for SPI and 2x DDS bus, update docs
2016-04-13 18:39:50 +08:00
90876e0143
examples: move pdq2 frame selects away from TTLInOut ttl3
2016-04-12 19:41:16 +08:00
6552aa4c28
test: set inputs to input(), should close #383
2016-04-12 18:17:39 +08:00
936190033e
gui/models: handle Qt calling DictSyncTreeSepModel.index with garbage inputs. Closes #388
2016-04-11 20:12:07 +08:00
e7d448efd3
dashboard/moninj: use ephemeral UDP port
2016-04-11 18:58:22 +08:00
a6c17d3e40
dashboard/moninj: fix windows problems
2016-04-11 18:58:13 +08:00
e4833a33fc
dashboard/moninj: use thread instead of asyncio UDP ( #39 )
2016-04-11 18:57:21 +08:00
